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PCB, FPGA, and SW design to implement a tiny Ethernet-connected SoC based on SERV + Trashernet
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Markus Koch e333a3d0d6 fpga: Implement basic SERV SoC
2024-06-22 11:22:43 +02:00
fpga fpga: Implement basic SERV SoC 2024-06-22 11:22:43 +02:00
kicad Swap RX+ and - 2024-06-02 10:15:13 +02:00
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README.MD fpga: Implement basic SERV SoC 2024-06-22 11:22:43 +02:00

README.MD

Trashernet SoC

PCB, FPGA, and SW design to implement a tiny Ethernet-connected SoC based on SERV + Trashernet.

License

Trashernet SoC, Copyright (C) 2024 Markus Koch markus@notsyncing.net

Hardware

The PCB design in /kicad is released under a Creative Commons Attribution-ShareAlike 4.0 International license.

You can find a copy of the full license in LICENSE-CC-BY-SA-4.0.TXT.

FPGA

The FPGA Source Code Form is subject to the terms of the Mozilla Public License, v. 2.0.

You can find a copy of the full license in LICENSE-MPL-2.0.txt.

SW

TBD.