electronics/ttl-fpga
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Layout input muxing

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This commit is contained in:
Markus Koch 2019-06-05 23:32:39 +02:00
parent b15d865090
commit 8b80a78b3b
4 changed files with 522 additions and 260 deletions
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310
kicad_pcb/logic_block.sch
View File

@ -7,7 +7,7 @@ encoding utf-8
Sheet 2 3 Sheet 2 3
Title "DISCRETE TTL FPGA" Title "DISCRETE TTL FPGA"
Date "2019-05-31" Date "2019-05-31"
Rev "02" Rev "02L"
Comp "Markus Koch <markus@notsyncing.net>" Comp "Markus Koch <markus@notsyncing.net>"
Comment1 "Logic Block" Comment1 "Logic Block"
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2
kicad_pcb/lutd.sch
View File

@ -7,7 +7,7 @@ encoding utf-8
Sheet 3 3 Sheet 3 3
Title "DISCRETE TTL FPGA" Title "DISCRETE TTL FPGA"
Date "2019-05-31" Date "2019-05-31"
Rev "02" Rev "02L"
Comp "Markus Koch <markus@notsyncing.net>" Comp "Markus Koch <markus@notsyncing.net>"
Comment1 "Logic Block" Comment1 "Logic Block"
Comment2 "single 4-input LUT / dual 3-input LUT" Comment2 "single 4-input LUT / dual 3-input LUT"

468
kicad_pcb/ttl-fpga.kicad_pcb
View File

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(net 39 /fabric_b1))
(pad 15 smd roundrect (at 2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 15 smd roundrect (at 2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 35 /fabric_l3)) (net 33 /fabric_l1))
(pad 16 smd roundrect (at 2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 16 smd roundrect (at 2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC)) (net 2 VCC))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
@ -2430,7 +2430,7 @@
) )
(module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF2C830) (module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF2C830)
(at 102.87 49.53) (at 92.775 50.8)
(descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py") (descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO") (tags "SOIC SO")
(path /5D77FDBE/5DA6508D) (path /5D77FDBE/5DA6508D)
@ -2441,50 +2441,50 @@
(fp_text value 74164 (at 0 -5.28) (layer B.Fab) (fp_text value 74164 (at 0 -5.28) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_line (start 0 -4.435) (end 1.95 -4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end -1.95 -4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end 1.95 4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end -3.45 4.435) (layer B.SilkS) (width 0.12))
(fp_line (start -0.975 4.325) (end 1.95 4.325) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 4.325) (end 1.95 -4.325) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 -4.325) (end -1.95 -4.325) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 -4.325) (end -1.95 3.35) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 3.35) (end -0.975 4.325) (layer B.Fab) (width 0.1))
(fp_line (start -3.7 4.58) (end -3.7 -4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 -4.58) (end 3.7 -4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 -4.58) (end 3.7 4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 4.58) (end -3.7 4.58) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer B.Fab) (fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)) (justify mirror)) (effects (font (size 0.98 0.98) (thickness 0.15)) (justify mirror))
) )
(pad 1 smd roundrect (at -2.475 3.81) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (fp_line (start 3.7 4.58) (end -3.7 4.58) (layer B.CrtYd) (width 0.05))
(net 26 /LogicBlock/isp_mosi)) (fp_line (start 3.7 -4.58) (end 3.7 4.58) (layer B.CrtYd) (width 0.05))
(pad 2 smd roundrect (at -2.475 2.54) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (fp_line (start -3.7 -4.58) (end 3.7 -4.58) (layer B.CrtYd) (width 0.05))
(net 26 /LogicBlock/isp_mosi)) (fp_line (start -3.7 4.58) (end -3.7 -4.58) (layer B.CrtYd) (width 0.05))
(pad 3 smd roundrect (at -2.475 1.27) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (fp_line (start -1.95 3.35) (end -0.975 4.325) (layer B.Fab) (width 0.1))
(net 50 /LogicBlock/cfg0)) (fp_line (start -1.95 -4.325) (end -1.95 3.35) (layer B.Fab) (width 0.1))
(pad 4 smd roundrect (at -2.475 0) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (fp_line (start 1.95 -4.325) (end -1.95 -4.325) (layer B.Fab) (width 0.1))
(net 51 /LogicBlock/cfg1)) (fp_line (start 1.95 4.325) (end 1.95 -4.325) (layer B.Fab) (width 0.1))
(pad 5 smd roundrect (at -2.475 -1.27) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (fp_line (start -0.975 4.325) (end 1.95 4.325) (layer B.Fab) (width 0.1))
(net 52 /LogicBlock/cfg2)) (fp_line (start 0 4.435) (end -3.45 4.435) (layer B.SilkS) (width 0.12))
(pad 6 smd roundrect (at -2.475 -2.54) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (fp_line (start 0 4.435) (end 1.95 4.435) (layer B.SilkS) (width 0.12))
(net 53 /LogicBlock/cfg3)) (fp_line (start 0 -4.435) (end -1.95 -4.435) (layer B.SilkS) (width 0.12))
(pad 7 smd roundrect (at -2.475 -3.81) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (fp_line (start 0 -4.435) (end 1.95 -4.435) (layer B.SilkS) (width 0.12))
(net 1 GND))
(pad 8 smd roundrect (at 2.475 -3.81) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 27 /LogicBlock/isp_sck))
(pad 9 smd roundrect (at 2.475 -2.54) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 10 smd roundrect (at 2.475 -1.27) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 54 /LogicBlock/cfg4))
(pad 11 smd roundrect (at 2.475 0) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 55 /LogicBlock/cfg5))
(pad 12 smd roundrect (at 2.475 1.27) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 56 /LogicBlock/cfg6))
(pad 13 smd roundrect (at 2.475 2.54) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 57 /LogicBlock/cfg7))
(pad 14 smd roundrect (at 2.475 3.81) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 14 smd roundrect (at 2.475 3.81) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 VCC)) (net 2 VCC))
(pad 13 smd roundrect (at 2.475 2.54) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 57 /LogicBlock/cfg7))
(pad 12 smd roundrect (at 2.475 1.27) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 56 /LogicBlock/cfg6))
(pad 11 smd roundrect (at 2.475 0) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 55 /LogicBlock/cfg5))
(pad 10 smd roundrect (at 2.475 -1.27) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 54 /LogicBlock/cfg4))
(pad 9 smd roundrect (at 2.475 -2.54) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 8 smd roundrect (at 2.475 -3.81) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 27 /LogicBlock/isp_sck))
(pad 7 smd roundrect (at -2.475 -3.81) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 6 smd roundrect (at -2.475 -2.54) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 53 /LogicBlock/cfg3))
(pad 5 smd roundrect (at -2.475 -1.27) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 52 /LogicBlock/cfg2))
(pad 4 smd roundrect (at -2.475 0) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 51 /LogicBlock/cfg1))
(pad 3 smd roundrect (at -2.475 1.27) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 50 /LogicBlock/cfg0))
(pad 2 smd roundrect (at -2.475 2.54) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 26 /LogicBlock/isp_mosi))
(pad 1 smd roundrect (at -2.475 3.81) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 26 /LogicBlock/isp_mosi))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))
@ -2493,7 +2493,7 @@
) )
(module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF85585) (module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF85585)
(at 91.505 63.5) (at 99.06358 71.9836)
(descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py") (descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO") (tags "SOIC SO")
(path /5D77FDBE/5DB5F0CD) (path /5D77FDBE/5DB5F0CD)
@ -2619,7 +2619,7 @@
) )
(module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF57B3F) (module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF57B3F)
(at 115.57 72.39 90) (at 102.87 72.39 90)
(descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py") (descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO") (tags "SOIC SO")
(path /5D77FDBE/5DB5F0EE) (path /5D77FDBE/5DB5F0EE)
@ -2749,7 +2749,7 @@
) )
(module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF84EFF) (module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF84EFF)
(at 106.615 61.595 180) (at 107.885 61.595 180)
(descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py") (descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO") (tags "SOIC SO")
(path /5D77FDBE/5E01B8F6) (path /5D77FDBE/5E01B8F6)
@ -2779,7 +2779,7 @@
(pad 1 smd roundrect (at -2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 1 smd roundrect (at -2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 34 /fabric_l2)) (net 34 /fabric_l2))
(pad 2 smd roundrect (at -2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 2 smd roundrect (at -2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 33 /fabric_l1)) (net 35 /fabric_l3))
(pad 3 smd roundrect (at -2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 3 smd roundrect (at -2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 32 /fabric_l0)) (net 32 /fabric_l0))
(pad 4 smd roundrect (at -2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 4 smd roundrect (at -2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
@ -2801,11 +2801,11 @@
(pad 12 smd roundrect (at 2.475 -0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 12 smd roundrect (at 2.475 -0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 21 /fabric_t2)) (net 21 /fabric_t2))
(pad 13 smd roundrect (at 2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 13 smd roundrect (at 2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 39 /fabric_b1))
(pad 14 smd roundrect (at 2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 40 /fabric_b0)) (net 40 /fabric_b0))
(pad 14 smd roundrect (at 2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 39 /fabric_b1))
(pad 15 smd roundrect (at 2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 15 smd roundrect (at 2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 35 /fabric_l3)) (net 33 /fabric_l1))
(pad 16 smd roundrect (at 2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 16 smd roundrect (at 2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 VCC)) (net 2 VCC))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
@ -2913,7 +2913,7 @@
(pad 16 smd roundrect (at 2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 16 smd roundrect (at 2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 VCC)) (net 2 VCC))
(pad 15 smd roundrect (at 2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 15 smd roundrect (at 2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 33 /fabric_l1)) (net 35 /fabric_l3))
(pad 14 smd roundrect (at 2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 14 smd roundrect (at 2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 32 /fabric_l0)) (net 32 /fabric_l0))
(pad 13 smd roundrect (at 2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 13 smd roundrect (at 2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
@ -2935,11 +2935,11 @@
(pad 5 smd roundrect (at -2.475 -0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 5 smd roundrect (at -2.475 -0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 81 /LogicBlock/lut_in1)) (net 81 /LogicBlock/lut_in1))
(pad 4 smd roundrect (at -2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 4 smd roundrect (at -2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 39 /fabric_b1))
(pad 3 smd roundrect (at -2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 40 /fabric_b0)) (net 40 /fabric_b0))
(pad 3 smd roundrect (at -2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 39 /fabric_b1))
(pad 2 smd roundrect (at -2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 2 smd roundrect (at -2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 35 /fabric_l3)) (net 33 /fabric_l1))
(pad 1 smd roundrect (at -2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (pad 1 smd roundrect (at -2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 34 /fabric_l2)) (net 34 /fabric_l2))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
@ -2950,7 +2950,7 @@
) )
(module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF733FC) (module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF733FC)
(at 106.615 61.595) (at 107.885 61.595)
(descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py") (descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO") (tags "SOIC SO")
(path /5D77FDBE/5E01B8D6) (path /5D77FDBE/5E01B8D6)
@ -2980,7 +2980,7 @@
(pad 16 smd roundrect (at 2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 16 smd roundrect (at 2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC)) (net 2 VCC))
(pad 15 smd roundrect (at 2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 15 smd roundrect (at 2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 33 /fabric_l1)) (net 35 /fabric_l3))
(pad 14 smd roundrect (at 2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 14 smd roundrect (at 2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 32 /fabric_l0)) (net 32 /fabric_l0))
(pad 13 smd roundrect (at 2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 13 smd roundrect (at 2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
@ -3002,11 +3002,11 @@
(pad 5 smd roundrect (at -2.475 0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 5 smd roundrect (at -2.475 0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 82 /LogicBlock/lut_in3)) (net 82 /LogicBlock/lut_in3))
(pad 4 smd roundrect (at -2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 4 smd roundrect (at -2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 39 /fabric_b1))
(pad 3 smd roundrect (at -2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 40 /fabric_b0)) (net 40 /fabric_b0))
(pad 3 smd roundrect (at -2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 39 /fabric_b1))
(pad 2 smd roundrect (at -2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 2 smd roundrect (at -2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 35 /fabric_l3)) (net 33 /fabric_l1))
(pad 1 smd roundrect (at -2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 1 smd roundrect (at -2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 34 /fabric_l2)) (net 34 /fabric_l2))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
@ -3343,61 +3343,61 @@
) )
) )
(module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF2E0C2) (module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF8DCF5)
(at 99.06 49.53) (at 102.235 50.735 270)
(descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py") (descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO") (tags "SOIC SO")
(path /5D77FDBE/5E0E0FAE) (path /5D77FDBE/5E0E0FAE)
(attr smd) (attr smd)
(fp_text reference U3 (at 0 -5.28) (layer F.SilkS) (fp_text reference U3 (at 0 5.28 90) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_text value 4066 (at 0 5.28) (layer F.Fab) (fp_text value 4066 (at 0 -5.28 90) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_line (start 0 4.435) (end 1.95 4.435) (layer F.SilkS) (width 0.12)) (fp_line (start 0 -4.435) (end 1.95 -4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end -1.95 4.435) (layer F.SilkS) (width 0.12)) (fp_line (start 0 -4.435) (end -1.95 -4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end 1.95 -4.435) (layer F.SilkS) (width 0.12)) (fp_line (start 0 4.435) (end 1.95 4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end -3.45 -4.435) (layer F.SilkS) (width 0.12)) (fp_line (start 0 4.435) (end -3.45 4.435) (layer B.SilkS) (width 0.12))
(fp_line (start -0.975 -4.325) (end 1.95 -4.325) (layer F.Fab) (width 0.1)) (fp_line (start -0.975 4.325) (end 1.95 4.325) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 -4.325) (end 1.95 4.325) (layer F.Fab) (width 0.1)) (fp_line (start 1.95 4.325) (end 1.95 -4.325) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 4.325) (end -1.95 4.325) (layer F.Fab) (width 0.1)) (fp_line (start 1.95 -4.325) (end -1.95 -4.325) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 4.325) (end -1.95 -3.35) (layer F.Fab) (width 0.1)) (fp_line (start -1.95 -4.325) (end -1.95 3.35) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 -3.35) (end -0.975 -4.325) (layer F.Fab) (width 0.1)) (fp_line (start -1.95 3.35) (end -0.975 4.325) (layer B.Fab) (width 0.1))
(fp_line (start -3.7 -4.58) (end -3.7 4.58) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.7 4.58) (end -3.7 -4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 4.58) (end 3.7 4.58) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.7 -4.58) (end 3.7 -4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 4.58) (end 3.7 -4.58) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.7 -4.58) (end 3.7 4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 -4.58) (end -3.7 -4.58) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.7 4.58) (end -3.7 4.58) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab) (fp_text user %R (at 0 0 90) (layer B.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15))) (effects (font (size 0.98 0.98) (thickness 0.15)) (justify mirror))
) )
(pad 1 smd roundrect (at -2.475 -3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 1 smd roundrect (at -2.475 3.81 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 20 /fabric_t3)) (net 20 /fabric_t3))
(pad 2 smd roundrect (at -2.475 -2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 2 smd roundrect (at -2.475 2.54 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 110 /fabric_b3)) (net 110 /fabric_b3))
(pad 3 smd roundrect (at -2.475 -1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 3 smd roundrect (at -2.475 1.27 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 38 /fabric_b2)) (net 38 /fabric_b2))
(pad 4 smd roundrect (at -2.475 0) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 4 smd roundrect (at -2.475 0 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 21 /fabric_t2)) (net 34 /fabric_l2))
(pad 5 smd roundrect (at -2.475 1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 5 smd roundrect (at -2.475 -1.27 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 52 /LogicBlock/cfg2)) (net 54 /LogicBlock/cfg4))
(pad 6 smd roundrect (at -2.475 2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 6 smd roundrect (at -2.475 -2.54 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 51 /LogicBlock/cfg1))
(pad 7 smd roundrect (at -2.475 3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 8 smd roundrect (at 2.475 3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 22 /fabric_t1))
(pad 9 smd roundrect (at 2.475 2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 39 /fabric_b1))
(pad 10 smd roundrect (at 2.475 1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 40 /fabric_b0))
(pad 11 smd roundrect (at 2.475 0) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 23 /fabric_t0))
(pad 12 smd roundrect (at 2.475 -1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 50 /LogicBlock/cfg0))
(pad 13 smd roundrect (at 2.475 -2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 53 /LogicBlock/cfg3)) (net 53 /LogicBlock/cfg3))
(pad 14 smd roundrect (at 2.475 -3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 7 smd roundrect (at -2.475 -3.81 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 8 smd roundrect (at 2.475 -3.81 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 32 /fabric_l0))
(pad 9 smd roundrect (at 2.475 -2.54 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 40 /fabric_b0))
(pad 10 smd roundrect (at 2.475 -1.27 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 39 /fabric_b1))
(pad 11 smd roundrect (at 2.475 0 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 33 /fabric_l1))
(pad 12 smd roundrect (at 2.475 1.27 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 56 /LogicBlock/cfg6))
(pad 13 smd roundrect (at 2.475 2.54 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 57 /LogicBlock/cfg7))
(pad 14 smd roundrect (at 2.475 3.81 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 VCC)) (net 2 VCC))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
@ -3406,8 +3406,8 @@
) )
) )
(module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF2E0E1) (module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF8DDB0)
(at 106.68 49.53) (at 102.805 50.165)
(descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py") (descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO") (tags "SOIC SO")
(path /5D77FDBE/5E0E1A05) (path /5D77FDBE/5E0E1A05)
@ -3437,31 +3437,31 @@
(pad 14 smd roundrect (at 2.475 -3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 14 smd roundrect (at 2.475 -3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC)) (net 2 VCC))
(pad 13 smd roundrect (at 2.475 -2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 13 smd roundrect (at 2.475 -2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 54 /LogicBlock/cfg4)) (net 52 /LogicBlock/cfg2))
(pad 12 smd roundrect (at 2.475 -1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 12 smd roundrect (at 2.475 -1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 57 /LogicBlock/cfg7)) (net 51 /LogicBlock/cfg1))
(pad 11 smd roundrect (at 2.475 0) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 11 smd roundrect (at 2.475 0) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 35 /fabric_l3)) (net 22 /fabric_t1))
(pad 10 smd roundrect (at 2.475 1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 10 smd roundrect (at 2.475 1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 110 /fabric_b3)) (net 39 /fabric_b1))
(pad 9 smd roundrect (at 2.475 2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 9 smd roundrect (at 2.475 2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 38 /fabric_b2)) (net 40 /fabric_b0))
(pad 8 smd roundrect (at 2.475 3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 8 smd roundrect (at 2.475 3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 34 /fabric_l2)) (net 23 /fabric_t0))
(pad 7 smd roundrect (at -2.475 3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 7 smd roundrect (at -2.475 3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND)) (net 1 GND))
(pad 6 smd roundrect (at -2.475 2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 6 smd roundrect (at -2.475 2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 56 /LogicBlock/cfg6))
(pad 5 smd roundrect (at -2.475 1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 55 /LogicBlock/cfg5)) (net 55 /LogicBlock/cfg5))
(pad 5 smd roundrect (at -2.475 1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 50 /LogicBlock/cfg0))
(pad 4 smd roundrect (at -2.475 0) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 4 smd roundrect (at -2.475 0) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 33 /fabric_l1)) (net 35 /fabric_l3))
(pad 3 smd roundrect (at -2.475 -1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 3 smd roundrect (at -2.475 -1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 39 /fabric_b1)) (net 110 /fabric_b3))
(pad 2 smd roundrect (at -2.475 -2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 2 smd roundrect (at -2.475 -2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 40 /fabric_b0)) (net 38 /fabric_b2))
(pad 1 smd roundrect (at -2.475 -3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (pad 1 smd roundrect (at -2.475 -3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 32 /fabric_l0)) (net 21 /fabric_t2))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))
@ -4012,4 +4012,234 @@
(gr_line (start 208.28 91.44) (end 256.54 91.44) (layer Edge.Cuts) (width 0.05)) (gr_line (start 208.28 91.44) (end 256.54 91.44) (layer Edge.Cuts) (width 0.05))
(gr_line (start 208.28 43.18) (end 208.28 91.44) (layer Edge.Cuts) (width 0.05)) (gr_line (start 208.28 43.18) (end 208.28 91.44) (layer Edge.Cuts) (width 0.05))
(segment (start 111.435 62.23) (end 110.36 62.23) (width 0.1524) (layer F.Cu) (net 20))
(segment (start 112.28071 62.23) (end 111.435 62.23) (width 0.1524) (layer F.Cu) (net 20))
(segment (start 112.788989 61.721721) (end 112.28071 62.23) (width 0.1524) (layer F.Cu) (net 20))
(segment (start 112.788989 52.725609) (end 112.788989 61.721721) (width 0.1524) (layer F.Cu) (net 20))
(segment (start 107.49788 47.4345) (end 112.788989 52.725609) (width 0.1524) (layer F.Cu) (net 20))
(via (at 98.425 48.26) (size 0.6) (drill 0.3) (layers F.Cu B.Cu) (net 20))
(segment (start 107.49788 47.010236) (end 107.49788 47.4345) (width 0.1524) (layer F.Cu) (net 20))
(segment (start 107.49788 46.631378) (end 107.49788 47.010236) (width 0.1524) (layer F.Cu) (net 20))
(segment (start 99.652984 45.52158) (end 106.388083 45.521581) (width 0.1524) (layer F.Cu) (net 20))
(segment (start 98.79571 46.378854) (end 99.652984 45.52158) (width 0.1524) (layer F.Cu) (net 20))
(segment (start 98.79571 47.88929) (end 98.79571 46.378854) (width 0.1524) (layer F.Cu) (net 20))
(segment (start 106.388083 45.521581) (end 107.49788 46.631378) (width 0.1524) (layer F.Cu) (net 20))
(segment (start 98.425 48.26) (end 98.79571 47.88929) (width 0.1524) (layer F.Cu) (net 20))
(via (at 112.18418 61.5442) (size 0.6) (drill 0.3) (layers F.Cu B.Cu) (net 21))
(segment (start 112.13084 61.59754) (end 112.18418 61.5442) (width 0.1524) (layer B.Cu) (net 21))
(segment (start 105.41 62.23) (end 106.04246 61.59754) (width 0.1524) (layer B.Cu) (net 21))
(segment (start 106.04246 61.59754) (end 112.13084 61.59754) (width 0.1524) (layer B.Cu) (net 21))
(segment (start 112.484179 61.244201) (end 112.484179 53.318743) (width 0.1524) (layer F.Cu) (net 21))
(segment (start 112.18418 61.5442) (end 112.484179 61.244201) (width 0.1524) (layer F.Cu) (net 21))
(segment (start 100.70071 45.98429) (end 100.33 46.355) (width 0.1524) (layer F.Cu) (net 21))
(segment (start 100.85861 45.82639) (end 100.70071 45.98429) (width 0.1524) (layer F.Cu) (net 21))
(segment (start 106.261826 45.82639) (end 100.85861 45.82639) (width 0.1524) (layer F.Cu) (net 21))
(segment (start 106.802528 46.367092) (end 106.261826 45.82639) (width 0.1524) (layer F.Cu) (net 21))
(segment (start 106.802528 47.637092) (end 106.802528 46.367092) (width 0.1524) (layer F.Cu) (net 21))
(segment (start 112.484179 53.318743) (end 106.802528 47.637092) (width 0.1524) (layer F.Cu) (net 21))
(via (at 98.04654 62.25286) (size 0.6) (drill 0.3) (layers F.Cu B.Cu) (net 22))
(segment (start 96.54286 62.25286) (end 96.52 62.23) (width 0.1524) (layer B.Cu) (net 22))
(segment (start 98.04654 62.25286) (end 96.54286 62.25286) (width 0.1524) (layer B.Cu) (net 22))
(segment (start 104.205 50.165) (end 105.28 50.165) (width 0.1524) (layer F.Cu) (net 22))
(segment (start 101.706399 52.663601) (end 104.205 50.165) (width 0.1524) (layer F.Cu) (net 22))
(segment (start 101.706399 54.109037) (end 101.706399 52.663601) (width 0.1524) (layer F.Cu) (net 22))
(segment (start 100.26639 55.549046) (end 101.706399 54.109037) (width 0.1524) (layer F.Cu) (net 22))
(segment (start 100.26639 59.608746) (end 100.26639 55.549046) (width 0.1524) (layer F.Cu) (net 22))
(segment (start 98.04654 61.828596) (end 100.26639 59.608746) (width 0.1524) (layer F.Cu) (net 22))
(segment (start 98.04654 62.25286) (end 98.04654 61.828596) (width 0.1524) (layer F.Cu) (net 22))
(segment (start 103.703109 55.551891) (end 104.90929 54.34571) (width 0.1524) (layer F.Cu) (net 23))
(segment (start 104.90929 54.34571) (end 105.28 53.975) (width 0.1524) (layer F.Cu) (net 23))
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2
kicad_pcb/ttl-fpga.sch
View File

@ -7,7 +7,7 @@ encoding utf-8
Sheet 1 3 Sheet 1 3
Title "DISCRETE TTL FPGA" Title "DISCRETE TTL FPGA"
Date "2019-05-31" Date "2019-05-31"
Rev "02" Rev "02L"
Comp "Markus Koch <markus@notsyncing.net>" Comp "Markus Koch <markus@notsyncing.net>"
Comment1 "PCB" Comment1 "PCB"
Comment2 "" Comment2 ""