Design first draft of core logic
This commit is contained in:
commit
9be0ea5ed4
5
.gitignore
vendored
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5
.gitignore
vendored
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@ -0,0 +1,5 @@
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*.bak
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*.kicad_pcb-bak
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*.net
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*.out
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||||
fp-info-cache
|
||||
1739
logic_block.sch
Normal file
1739
logic_block.sch
Normal file
File diff suppressed because it is too large
Load Diff
726
lutd.sch
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726
lutd.sch
Normal file
@ -0,0 +1,726 @@
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||||
EESchema Schematic File Version 4
|
||||
EELAYER 29 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 3 3
|
||||
Title "DISCRETE TTL FPGA"
|
||||
Date ""
|
||||
Rev "01"
|
||||
Comp "Markus Koch <markus@notsyncing.net>"
|
||||
Comment1 "Logic Block"
|
||||
Comment2 "single 4-input LUT / dual 3-input LUT"
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Comp
|
||||
L 74xx_IEEE:74164 U?
|
||||
U 1 1 5CF42176
|
||||
P 3100 3450
|
||||
AR Path="/5CF41639/5CF42176" Ref="U?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5CF42176" Ref="U?" Part="1"
|
||||
F 0 "U?" H 3450 3650 50 0000 C CNN
|
||||
F 1 "74164" H 3500 3750 50 0000 C CNN
|
||||
F 2 "" H 3100 3450 50 0001 C CNN
|
||||
F 3 "" H 3100 3450 50 0001 C CNN
|
||||
1 3100 3450
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L 74xx_IEEE:74164 U?
|
||||
U 1 1 5CF427E5
|
||||
P 3100 5000
|
||||
AR Path="/5CF41639/5CF427E5" Ref="U?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5CF427E5" Ref="U?" Part="1"
|
||||
F 0 "U?" H 3450 5200 50 0000 C CNN
|
||||
F 1 "74164" H 3500 5300 50 0000 C CNN
|
||||
F 2 "" H 3100 5000 50 0001 C CNN
|
||||
F 3 "" H 3100 5000 50 0001 C CNN
|
||||
1 3100 5000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
2550 5100 2500 5100
|
||||
Wire Wire Line
|
||||
2500 5100 2500 5050
|
||||
Wire Wire Line
|
||||
2500 5000 2550 5000
|
||||
Wire Wire Line
|
||||
3650 4250 3700 4250
|
||||
Wire Wire Line
|
||||
2450 4400 2450 5050
|
||||
Wire Wire Line
|
||||
2450 5050 2500 5050
|
||||
Wire Wire Line
|
||||
3700 4250 3700 4400
|
||||
Connection ~ 2500 5050
|
||||
Wire Wire Line
|
||||
2500 5050 2500 5000
|
||||
Wire Wire Line
|
||||
2550 3550 2500 3550
|
||||
Wire Wire Line
|
||||
2500 3550 2500 3500
|
||||
Wire Wire Line
|
||||
2500 3450 2550 3450
|
||||
Wire Wire Line
|
||||
2550 4850 2350 4850
|
||||
Wire Wire Line
|
||||
2350 4850 2350 3300
|
||||
Wire Wire Line
|
||||
2350 3300 2550 3300
|
||||
Wire Wire Line
|
||||
2500 3500 2000 3500
|
||||
Connection ~ 2500 3500
|
||||
Wire Wire Line
|
||||
2500 3500 2500 3450
|
||||
Wire Wire Line
|
||||
2350 3300 2000 3300
|
||||
Connection ~ 2350 3300
|
||||
Wire Wire Line
|
||||
3650 3750 4250 3750
|
||||
Wire Wire Line
|
||||
3650 3650 4250 3650
|
||||
Wire Wire Line
|
||||
4250 3850 3650 3850
|
||||
Wire Wire Line
|
||||
3650 3950 4250 3950
|
||||
Wire Wire Line
|
||||
3650 4050 4250 4050
|
||||
Wire Wire Line
|
||||
3650 4150 4250 4150
|
||||
Connection ~ 3700 4250
|
||||
Wire Wire Line
|
||||
3700 4250 4250 4250
|
||||
Wire Wire Line
|
||||
4250 3550 3700 3550
|
||||
Wire Wire Line
|
||||
3700 3550 3700 3500
|
||||
Wire Wire Line
|
||||
3700 3500 3650 3500
|
||||
$Comp
|
||||
L 74xx_IEEE:74251 U?
|
||||
U 1 1 5CF5B900
|
||||
P 4800 5200
|
||||
AR Path="/5CF41639/5CF5B900" Ref="U?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5CF5B900" Ref="U?" Part="1"
|
||||
F 0 "U?" H 5000 5900 50 0000 C CNN
|
||||
F 1 "74251" H 4700 5900 50 0000 C CNN
|
||||
F 2 "" H 4800 5200 50 0001 C CNN
|
||||
F 3 "" H 4800 5200 50 0001 C CNN
|
||||
1 4800 5200
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
4250 5200 3650 5200
|
||||
Wire Wire Line
|
||||
4250 5300 3650 5300
|
||||
Wire Wire Line
|
||||
4250 5400 3650 5400
|
||||
Wire Wire Line
|
||||
4250 5500 3650 5500
|
||||
Wire Wire Line
|
||||
4250 5600 3650 5600
|
||||
Wire Wire Line
|
||||
4250 5700 3650 5700
|
||||
Wire Wire Line
|
||||
4250 5800 3700 5800
|
||||
Wire Wire Line
|
||||
4250 5100 3700 5100
|
||||
Wire Wire Line
|
||||
3700 5100 3700 5050
|
||||
Wire Wire Line
|
||||
3700 5050 3650 5050
|
||||
Entry Wire Line
|
||||
3850 3100 3950 3200
|
||||
Entry Wire Line
|
||||
3850 3200 3950 3300
|
||||
Entry Wire Line
|
||||
3850 3300 3950 3400
|
||||
Wire Wire Line
|
||||
3950 3200 4250 3200
|
||||
$Comp
|
||||
L 74xx_IEEE:74251 U?
|
||||
U 1 1 5CF4F8AB
|
||||
P 4800 3650
|
||||
AR Path="/5CF41639/5CF4F8AB" Ref="U?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5CF4F8AB" Ref="U?" Part="1"
|
||||
F 0 "U?" H 5000 4350 50 0000 C CNN
|
||||
F 1 "74251" H 4700 4350 50 0000 C CNN
|
||||
F 2 "" H 4800 3650 50 0001 C CNN
|
||||
F 3 "" H 4800 3650 50 0001 C CNN
|
||||
1 4800 3650
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3950 3300 4250 3300
|
||||
Wire Wire Line
|
||||
3950 3400 4250 3400
|
||||
Entry Wire Line
|
||||
3850 4750 3950 4850
|
||||
Entry Wire Line
|
||||
3850 4650 3950 4750
|
||||
Entry Wire Line
|
||||
3850 4850 3950 4950
|
||||
Wire Wire Line
|
||||
3950 4750 4250 4750
|
||||
Wire Wire Line
|
||||
3950 4850 4250 4850
|
||||
Wire Wire Line
|
||||
3950 4950 4250 4950
|
||||
Text Label 3950 3300 0 50 ~ 0
|
||||
lut_in1
|
||||
Text Label 3950 3400 0 50 ~ 0
|
||||
lut_in2
|
||||
Text Label 3950 4750 0 50 ~ 0
|
||||
lut_in0
|
||||
Text Label 3950 4850 0 50 ~ 0
|
||||
lut_in1
|
||||
Text Label 3950 4950 0 50 ~ 0
|
||||
lut_in2
|
||||
Text HLabel 2000 3300 0 50 Input ~ 0
|
||||
isp_sck
|
||||
Text HLabel 2000 3500 0 50 Input ~ 0
|
||||
isp_mosi
|
||||
Wire Wire Line
|
||||
3700 5800 3700 5950
|
||||
Connection ~ 3700 5800
|
||||
Wire Wire Line
|
||||
3700 5800 3650 5800
|
||||
Wire Wire Line
|
||||
2000 5950 3700 5950
|
||||
Text HLabel 2000 5950 0 50 Output ~ 0
|
||||
isp_miso
|
||||
Text HLabel 2000 2700 0 50 Input ~ 0
|
||||
lut_in
|
||||
Text Label 3950 3200 0 50 ~ 0
|
||||
lut_in0
|
||||
Text Label 2300 2700 0 50 ~ 0
|
||||
lut_in[3..0]
|
||||
NoConn ~ 5350 4000
|
||||
NoConn ~ 5350 5550
|
||||
Text HLabel 2000 900 0 50 Input ~ 0
|
||||
cfg_sync
|
||||
NoConn ~ 7450 4300
|
||||
NoConn ~ 7450 4400
|
||||
NoConn ~ 7450 4500
|
||||
Text HLabel 2000 6650 0 50 Input ~ 0
|
||||
clk
|
||||
Text HLabel 2000 6750 0 50 Input ~ 0
|
||||
rst_n
|
||||
$Comp
|
||||
L power:GNDD #PWR?
|
||||
U 1 1 5D015E6D
|
||||
P 6200 4550
|
||||
AR Path="/5CF41639/5D015E6D" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D015E6D" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 6200 4300 50 0001 C CNN
|
||||
F 1 "GNDD" H 6204 4395 50 0000 C CNN
|
||||
F 2 "" H 6200 4550 50 0001 C CNN
|
||||
F 3 "" H 6200 4550 50 0001 C CNN
|
||||
1 6200 4550
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
6200 4550 6200 4500
|
||||
Wire Wire Line
|
||||
6200 4500 6450 4500
|
||||
Wire Wire Line
|
||||
6450 4400 6200 4400
|
||||
Wire Wire Line
|
||||
6200 4400 6200 4500
|
||||
Connection ~ 6200 4500
|
||||
Wire Wire Line
|
||||
6450 4300 6200 4300
|
||||
Wire Wire Line
|
||||
6200 4300 6200 4400
|
||||
Connection ~ 6200 4400
|
||||
Wire Wire Line
|
||||
4250 4650 3950 4650
|
||||
Entry Wire Line
|
||||
3850 4550 3950 4650
|
||||
Text Label 3950 4650 0 50 ~ 0
|
||||
lut_in3
|
||||
Wire Wire Line
|
||||
3950 3100 4250 3100
|
||||
Text Label 8150 3850 0 50 ~ 0
|
||||
cfg_sync
|
||||
Wire Wire Line
|
||||
8500 3850 8100 3850
|
||||
$Comp
|
||||
L 74xx_IEEE:74157 U?
|
||||
U 1 1 5D187D09
|
||||
P 9050 4150
|
||||
AR Path="/5CF41639/5D187D09" Ref="U?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D187D09" Ref="U?" Part="1"
|
||||
F 0 "U?" H 9050 4866 50 0000 C CNN
|
||||
F 1 "74157" H 9050 4775 50 0000 C CNN
|
||||
F 2 "" H 9050 4150 50 0001 C CNN
|
||||
F 3 "" H 9050 4150 50 0001 C CNN
|
||||
1 9050 4150
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L 74xx:74LS174 U?
|
||||
U 1 1 5CF941AD
|
||||
P 6950 4400
|
||||
AR Path="/5CF41639/5CF941AD" Ref="U?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5CF941AD" Ref="U?" Part="1"
|
||||
F 0 "U?" H 7200 4950 50 0000 C CNN
|
||||
F 1 "74LS174" H 6750 4950 50 0000 C CNN
|
||||
F 2 "" H 6950 4400 50 0001 C CNN
|
||||
F 3 "http://www.ti.com/lit/gpn/sn74LS174" H 6950 4400 50 0001 C CNN
|
||||
1 6950 4400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
6100 4000 6100 3300
|
||||
Wire Wire Line
|
||||
5350 3300 5800 3300
|
||||
Wire Wire Line
|
||||
6100 4000 6450 4000
|
||||
Wire Wire Line
|
||||
6100 4850 6100 4200
|
||||
Wire Wire Line
|
||||
6100 4200 6450 4200
|
||||
Wire Wire Line
|
||||
5350 4850 5800 4850
|
||||
$Comp
|
||||
L Device:D_ALT D?
|
||||
U 1 1 5D19E941
|
||||
P 5800 3650
|
||||
AR Path="/5CF41639/5D19E941" Ref="D?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D19E941" Ref="D?" Part="1"
|
||||
F 0 "D?" V 5846 3571 50 0000 R CNN
|
||||
F 1 "D_ALT" V 5755 3571 50 0000 R CNN
|
||||
F 2 "" H 5800 3650 50 0001 C CNN
|
||||
F 3 "~" H 5800 3650 50 0001 C CNN
|
||||
1 5800 3650
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L Device:D_ALT D?
|
||||
U 1 1 5D19F2CD
|
||||
P 5800 4500
|
||||
AR Path="/5CF41639/5D19F2CD" Ref="D?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D19F2CD" Ref="D?" Part="1"
|
||||
F 0 "D?" V 5754 4579 50 0000 L CNN
|
||||
F 1 "D_ALT" V 5845 4579 50 0000 L CNN
|
||||
F 2 "" H 5800 4500 50 0001 C CNN
|
||||
F 3 "~" H 5800 4500 50 0001 C CNN
|
||||
1 5800 4500
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
5800 4650 5800 4850
|
||||
Connection ~ 5800 4850
|
||||
Wire Wire Line
|
||||
5800 4850 6100 4850
|
||||
Wire Wire Line
|
||||
5800 4350 5800 4100
|
||||
Wire Wire Line
|
||||
5800 3500 5800 3300
|
||||
Connection ~ 5800 3300
|
||||
Wire Wire Line
|
||||
5800 3300 6100 3300
|
||||
Wire Wire Line
|
||||
6450 4100 5800 4100
|
||||
Connection ~ 5800 4100
|
||||
Wire Wire Line
|
||||
5800 4100 5800 3800
|
||||
Wire Wire Line
|
||||
5800 4100 5550 4100
|
||||
Wire Wire Line
|
||||
5550 4100 5550 4200
|
||||
$Comp
|
||||
L Device:R R?
|
||||
U 1 1 5D1A7947
|
||||
P 5550 4350
|
||||
AR Path="/5CF41639/5D1A7947" Ref="R?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D1A7947" Ref="R?" Part="1"
|
||||
F 0 "R?" H 5480 4304 50 0000 R CNN
|
||||
F 1 "10k" H 5480 4395 50 0000 R CNN
|
||||
F 2 "" V 5480 4350 50 0001 C CNN
|
||||
F 3 "~" H 5550 4350 50 0001 C CNN
|
||||
1 5550 4350
|
||||
1 0 0 1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:GNDD #PWR?
|
||||
U 1 1 5D1A7DBD
|
||||
P 5550 4600
|
||||
AR Path="/5CF41639/5D1A7DBD" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D1A7DBD" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 5550 4350 50 0001 C CNN
|
||||
F 1 "GNDD" H 5554 4445 50 0000 C CNN
|
||||
F 2 "" H 5550 4600 50 0001 C CNN
|
||||
F 3 "" H 5550 4600 50 0001 C CNN
|
||||
1 5550 4600
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
5550 4600 5550 4500
|
||||
Text Label 6150 4000 0 50 ~ 0
|
||||
async_a
|
||||
Text Label 6150 4100 0 50 ~ 0
|
||||
async_c
|
||||
Text Label 6150 4200 0 50 ~ 0
|
||||
async_b
|
||||
Wire Wire Line
|
||||
8500 4000 7450 4000
|
||||
Text Label 7550 4000 0 50 ~ 0
|
||||
sync_a
|
||||
Text Label 7550 4100 0 50 ~ 0
|
||||
sync_c
|
||||
Text Label 7550 4200 0 50 ~ 0
|
||||
sync_b
|
||||
Wire Wire Line
|
||||
7450 4100 7950 4100
|
||||
Wire Wire Line
|
||||
7950 4100 7950 4200
|
||||
Wire Wire Line
|
||||
7950 4200 8500 4200
|
||||
Wire Wire Line
|
||||
7450 4200 7850 4200
|
||||
Wire Wire Line
|
||||
8500 4400 7850 4400
|
||||
Wire Wire Line
|
||||
7850 4200 7850 4400
|
||||
Wire Wire Line
|
||||
8500 4100 8150 4100
|
||||
Text Label 8150 4100 0 50 ~ 0
|
||||
async_a
|
||||
Text Label 8150 4300 0 50 ~ 0
|
||||
async_c
|
||||
Text Label 8150 4500 0 50 ~ 0
|
||||
async_b
|
||||
Wire Wire Line
|
||||
8150 4300 8500 4300
|
||||
Wire Wire Line
|
||||
8500 4500 8150 4500
|
||||
Wire Wire Line
|
||||
9600 4050 10000 4050
|
||||
Text HLabel 10000 4050 2 50 Output ~ 0
|
||||
lut_out_a
|
||||
Text HLabel 10000 4250 2 50 Output ~ 0
|
||||
lut_out_c
|
||||
Text HLabel 10000 4450 2 50 Output ~ 0
|
||||
lut_out_b
|
||||
Wire Wire Line
|
||||
10000 4450 9600 4450
|
||||
Wire Wire Line
|
||||
9600 4250 10000 4250
|
||||
Text Notes 4800 3700 0 94 ~ 0
|
||||
A
|
||||
Text Notes 4800 5300 0 94 ~ 0
|
||||
B
|
||||
$Comp
|
||||
L Device:Q_NPN_BCE Q?
|
||||
U 1 1 5D215162
|
||||
P 3700 2150
|
||||
AR Path="/5CF41639/5D215162" Ref="Q?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D215162" Ref="Q?" Part="1"
|
||||
F 0 "Q?" H 3891 2196 50 0000 L CNN
|
||||
F 1 "Q_NPN_BCE" H 3891 2105 50 0000 L CNN
|
||||
F 2 "" H 3900 2250 50 0001 C CNN
|
||||
F 3 "~" H 3700 2150 50 0001 C CNN
|
||||
1 3700 2150
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Device:R R?
|
||||
U 1 1 5D21734D
|
||||
P 3800 1700
|
||||
AR Path="/5CF41639/5D21734D" Ref="R?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D21734D" Ref="R?" Part="1"
|
||||
F 0 "R?" H 3730 1654 50 0000 R CNN
|
||||
F 1 "10k" H 3730 1745 50 0000 R CNN
|
||||
F 2 "" V 3730 1700 50 0001 C CNN
|
||||
F 3 "~" H 3800 1700 50 0001 C CNN
|
||||
1 3800 1700
|
||||
1 0 0 1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3800 1850 3800 1900
|
||||
$Comp
|
||||
L power:GNDD #PWR?
|
||||
U 1 1 5D2296E9
|
||||
P 3800 2450
|
||||
AR Path="/5CF41639/5D2296E9" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D2296E9" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 3800 2200 50 0001 C CNN
|
||||
F 1 "GNDD" H 3804 2295 50 0000 C CNN
|
||||
F 2 "" H 3800 2450 50 0001 C CNN
|
||||
F 3 "" H 3800 2450 50 0001 C CNN
|
||||
1 3800 2450
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3800 2450 3800 2350
|
||||
Wire Wire Line
|
||||
3800 1550 3800 1450
|
||||
$Comp
|
||||
L power:VCC #PWR?
|
||||
U 1 1 5D22E805
|
||||
P 3800 1450
|
||||
AR Path="/5CF41639/5D22E805" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D22E805" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 3800 1300 50 0001 C CNN
|
||||
F 1 "VCC" H 3817 1623 50 0000 C CNN
|
||||
F 2 "" H 3800 1450 50 0001 C CNN
|
||||
F 3 "" H 3800 1450 50 0001 C CNN
|
||||
1 3800 1450
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3950 1900 3800 1900
|
||||
Connection ~ 3800 1900
|
||||
Wire Wire Line
|
||||
3800 1900 3800 1950
|
||||
Entry Wire Line
|
||||
2900 2700 3000 2600
|
||||
Wire Wire Line
|
||||
3000 2600 3000 2150
|
||||
Text Label 3000 2600 1 50 ~ 0
|
||||
lut_in3
|
||||
Wire Wire Line
|
||||
6450 4700 6350 4700
|
||||
Wire Wire Line
|
||||
6350 4700 6350 6650
|
||||
Wire Wire Line
|
||||
6350 6650 2000 6650
|
||||
Wire Wire Line
|
||||
2000 6750 6450 6750
|
||||
Wire Wire Line
|
||||
6450 6750 6450 4900
|
||||
$Comp
|
||||
L power:GNDD #PWR?
|
||||
U 1 1 5D26A4EB
|
||||
P 6950 5300
|
||||
AR Path="/5CF41639/5D26A4EB" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D26A4EB" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 6950 5050 50 0001 C CNN
|
||||
F 1 "GNDD" H 6954 5145 50 0000 C CNN
|
||||
F 2 "" H 6950 5300 50 0001 C CNN
|
||||
F 3 "" H 6950 5300 50 0001 C CNN
|
||||
1 6950 5300
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
6950 5200 6950 5300
|
||||
$Comp
|
||||
L power:GNDD #PWR?
|
||||
U 1 1 5D276079
|
||||
P 8300 3550
|
||||
AR Path="/5CF41639/5D276079" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D276079" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 8300 3300 50 0001 C CNN
|
||||
F 1 "GNDD" H 8304 3395 50 0000 C CNN
|
||||
F 2 "" H 8300 3550 50 0001 C CNN
|
||||
F 3 "" H 8300 3550 50 0001 C CNN
|
||||
1 8300 3550
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
8300 3550 8300 3450
|
||||
Wire Wire Line
|
||||
8300 3450 8500 3450
|
||||
Wire Wire Line
|
||||
8500 3450 8500 3750
|
||||
$Comp
|
||||
L power:VCC #PWR?
|
||||
U 1 1 5D27AEF5
|
||||
P 6950 3600
|
||||
AR Path="/5CF41639/5D27AEF5" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D27AEF5" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 6950 3450 50 0001 C CNN
|
||||
F 1 "VCC" H 6967 3773 50 0000 C CNN
|
||||
F 2 "" H 6950 3600 50 0001 C CNN
|
||||
F 3 "" H 6950 3600 50 0001 C CNN
|
||||
1 6950 3600
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
6950 3600 6950 3700
|
||||
$Comp
|
||||
L power:GNDD #PWR?
|
||||
U 1 1 5D2924B9
|
||||
P 4800 6000
|
||||
AR Path="/5CF41639/5D2924B9" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D2924B9" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 4800 5750 50 0001 C CNN
|
||||
F 1 "GNDD" H 4804 5845 50 0000 C CNN
|
||||
F 2 "" H 4800 6000 50 0001 C CNN
|
||||
F 3 "" H 4800 6000 50 0001 C CNN
|
||||
1 4800 6000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
4800 6000 4800 5900
|
||||
$Comp
|
||||
L power:GNDD #PWR?
|
||||
U 1 1 5D2970E5
|
||||
P 4450 4400
|
||||
AR Path="/5CF41639/5D2970E5" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D2970E5" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 4450 4150 50 0001 C CNN
|
||||
F 1 "GNDD" H 4454 4245 50 0000 C CNN
|
||||
F 2 "" H 4450 4400 50 0001 C CNN
|
||||
F 3 "" H 4450 4400 50 0001 C CNN
|
||||
1 4450 4400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
4450 4400 4800 4400
|
||||
Wire Wire Line
|
||||
4800 4400 4800 4350
|
||||
$Comp
|
||||
L power:VCC #PWR?
|
||||
U 1 1 5D29AD03
|
||||
P 5150 4450
|
||||
AR Path="/5CF41639/5D29AD03" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D29AD03" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 5150 4300 50 0001 C CNN
|
||||
F 1 "VCC" H 5167 4623 50 0000 C CNN
|
||||
F 2 "" H 5150 4450 50 0001 C CNN
|
||||
F 3 "" H 5150 4450 50 0001 C CNN
|
||||
1 5150 4450
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
5150 4450 4800 4450
|
||||
Wire Wire Line
|
||||
4800 4450 4800 4550
|
||||
$Comp
|
||||
L power:VCC #PWR?
|
||||
U 1 1 5D29EA17
|
||||
P 4800 2900
|
||||
AR Path="/5CF41639/5D29EA17" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D29EA17" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 4800 2750 50 0001 C CNN
|
||||
F 1 "VCC" H 4817 3073 50 0000 C CNN
|
||||
F 2 "" H 4800 2900 50 0001 C CNN
|
||||
F 3 "" H 4800 2900 50 0001 C CNN
|
||||
1 4800 2900
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
4800 2900 4800 3000
|
||||
$Comp
|
||||
L power:GNDD #PWR?
|
||||
U 1 1 5D2B29AB
|
||||
P 2900 2850
|
||||
AR Path="/5CF41639/5D2B29AB" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D2B29AB" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 2900 2600 50 0001 C CNN
|
||||
F 1 "GNDD" H 2904 2695 50 0000 C CNN
|
||||
F 2 "" H 2900 2850 50 0001 C CNN
|
||||
F 3 "" H 2900 2850 50 0001 C CNN
|
||||
1 2900 2850
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
2900 2850 2900 2800
|
||||
Wire Wire Line
|
||||
2900 2800 3100 2800
|
||||
Wire Wire Line
|
||||
3100 2800 3100 3100
|
||||
$Comp
|
||||
L power:VCC #PWR?
|
||||
U 1 1 5D2B7E69
|
||||
P 3300 3000
|
||||
AR Path="/5CF41639/5D2B7E69" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D2B7E69" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 3300 2850 50 0001 C CNN
|
||||
F 1 "VCC" H 3317 3173 50 0000 C CNN
|
||||
F 2 "" H 3300 3000 50 0001 C CNN
|
||||
F 3 "" H 3300 3000 50 0001 C CNN
|
||||
1 3300 3000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3300 3000 3300 3100
|
||||
Wire Wire Line
|
||||
3700 4400 2450 4400
|
||||
$Comp
|
||||
L power:GNDD #PWR?
|
||||
U 1 1 5D2CD01F
|
||||
P 2900 4450
|
||||
AR Path="/5CF41639/5D2CD01F" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D2CD01F" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 2900 4200 50 0001 C CNN
|
||||
F 1 "GNDD" H 2904 4295 50 0000 C CNN
|
||||
F 2 "" H 2900 4450 50 0001 C CNN
|
||||
F 3 "" H 2900 4450 50 0001 C CNN
|
||||
1 2900 4450
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
2900 4450 3100 4450
|
||||
Wire Wire Line
|
||||
3100 4450 3100 4650
|
||||
$Comp
|
||||
L power:VCC #PWR?
|
||||
U 1 1 5D2D1794
|
||||
P 3300 4550
|
||||
AR Path="/5CF41639/5D2D1794" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D2D1794" Ref="#PWR?" Part="1"
|
||||
F 0 "#PWR?" H 3300 4400 50 0001 C CNN
|
||||
F 1 "VCC" H 3317 4723 50 0000 C CNN
|
||||
F 2 "" H 3300 4550 50 0001 C CNN
|
||||
F 3 "" H 3300 4550 50 0001 C CNN
|
||||
1 3300 4550
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3300 4550 3300 4650
|
||||
Text Label 3950 3100 0 50 ~ 0
|
||||
lut_in3_n
|
||||
Wire Wire Line
|
||||
8100 900 8100 3850
|
||||
Wire Wire Line
|
||||
2000 900 8100 900
|
||||
Text Label 8150 4600 0 50 ~ 0
|
||||
async_b
|
||||
Wire Wire Line
|
||||
8500 4600 8150 4600
|
||||
Text Label 8150 4700 0 50 ~ 0
|
||||
async_b
|
||||
Wire Wire Line
|
||||
8500 4700 8150 4700
|
||||
Text HLabel 10000 4650 2 50 Output ~ 0
|
||||
lut_out_b_async
|
||||
Wire Wire Line
|
||||
10000 4650 9600 4650
|
||||
Text HLabel 2000 1000 0 50 Input ~ 0
|
||||
cfg_split_n
|
||||
Wire Wire Line
|
||||
2000 1000 3950 1000
|
||||
Wire Wire Line
|
||||
3950 1000 3950 1900
|
||||
Connection ~ 3950 1900
|
||||
Wire Wire Line
|
||||
3950 1900 3950 3100
|
||||
$Comp
|
||||
L Device:R R?
|
||||
U 1 1 5D748DEE
|
||||
P 3250 2150
|
||||
AR Path="/5CF41639/5D748DEE" Ref="R?" Part="1"
|
||||
AR Path="/5D77FDBE/5D7AF013/5D748DEE" Ref="R?" Part="1"
|
||||
F 0 "R?" V 3043 2150 50 0000 C CNN
|
||||
F 1 "10k" V 3134 2150 50 0000 C CNN
|
||||
F 2 "" V 3180 2150 50 0001 C CNN
|
||||
F 3 "~" H 3250 2150 50 0001 C CNN
|
||||
1 3250 2150
|
||||
0 -1 1 0
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3100 2150 3000 2150
|
||||
Wire Wire Line
|
||||
3400 2150 3500 2150
|
||||
Wire Bus Line
|
||||
2000 2700 3850 2700
|
||||
Wire Bus Line
|
||||
3850 2700 3850 4950
|
||||
Text Notes 1850 1250 0 50 ~ 0
|
||||
TODO: MUX B needs to be\npermanently enabled for split mode
|
||||
$EndSCHEMATC
|
||||
296
ttl-fpga-cache.lib
Normal file
296
ttl-fpga-cache.lib
Normal file
@ -0,0 +1,296 @@
|
||||
EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# 4xxx_4066
|
||||
#
|
||||
DEF 4xxx_4066 U 0 40 Y Y 5 L N
|
||||
F0 "U" -300 350 50 H V C CNN
|
||||
F1 "4xxx_4066" -300 -350 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS 4066
|
||||
$FPLIST
|
||||
DIP?14*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -200 300 200 -300 5 1 10 f
|
||||
P 2 1 0 6 0 50 0 100 N
|
||||
P 4 1 0 0 -100 0 100 100 100 -100 -100 0 f
|
||||
P 4 1 0 0 -100 100 100 0 -100 -100 -100 100 f
|
||||
P 2 2 0 6 0 50 0 100 N
|
||||
P 4 2 0 0 -100 0 100 100 100 -100 -100 0 f
|
||||
P 4 2 0 0 -100 100 100 0 -100 -100 -100 100 f
|
||||
P 2 3 0 6 0 50 0 100 N
|
||||
P 4 3 0 0 -100 0 100 100 100 -100 -100 0 f
|
||||
P 4 3 0 0 -100 100 100 0 -100 -100 -100 100 f
|
||||
P 2 4 0 6 0 50 0 100 N
|
||||
P 4 4 0 0 -100 0 100 100 100 -100 -100 0 f
|
||||
P 4 4 0 0 -100 100 100 0 -100 -100 -100 100 f
|
||||
X ~ 1 -300 0 200 R 50 50 1 0 P
|
||||
X ~ 13 0 300 200 D 50 50 1 0 I
|
||||
X ~ 2 300 0 200 L 50 50 1 0 P
|
||||
X ~ 3 300 0 200 L 50 50 2 0 P
|
||||
X ~ 4 -300 0 200 R 50 50 2 0 P
|
||||
X ~ 5 0 300 200 D 50 50 2 0 I
|
||||
X ~ 6 0 300 200 D 50 50 3 0 I
|
||||
X ~ 8 -300 0 200 R 50 50 3 0 P
|
||||
X ~ 9 300 0 200 L 50 50 3 0 P
|
||||
X ~ 10 300 0 200 L 50 50 4 0 P
|
||||
X ~ 11 -300 0 200 R 50 50 4 0 P
|
||||
X ~ 12 0 300 200 D 50 50 4 0 I
|
||||
X VDD 14 0 500 200 D 50 50 5 0 W
|
||||
X VSS 7 0 -500 200 U 50 50 5 0 W
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# 74xx_74LS174
|
||||
#
|
||||
DEF 74xx_74LS174 U 0 40 Y Y 1 L N
|
||||
F0 "U" -300 550 50 H V C CNN
|
||||
F1 "74xx_74LS174" -300 -650 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
DIP?16*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -300 500 300 -600 1 1 10 f
|
||||
X ~Mr 1 -500 -500 200 R 50 50 1 0 I
|
||||
X Q3 10 500 100 200 L 50 50 1 0 O
|
||||
X D3 11 -500 100 200 R 50 50 1 0 I
|
||||
X Q4 12 500 0 200 L 50 50 1 0 O
|
||||
X D4 13 -500 0 200 R 50 50 1 0 I
|
||||
X D5 14 -500 -100 200 R 50 50 1 0 I
|
||||
X Q5 15 500 -100 200 L 50 50 1 0 O
|
||||
X VCC 16 0 700 200 D 50 50 1 0 W
|
||||
X Q0 2 500 400 200 L 50 50 1 0 O
|
||||
X D0 3 -500 400 200 R 50 50 1 0 I
|
||||
X D1 4 -500 300 200 R 50 50 1 0 I
|
||||
X Q1 5 500 300 200 L 50 50 1 0 O
|
||||
X D2 6 -500 200 200 R 50 50 1 0 I
|
||||
X Q2 7 500 200 200 L 50 50 1 0 O
|
||||
X GND 8 0 -800 200 U 50 50 1 0 W
|
||||
X Cp 9 -500 -300 200 R 50 50 1 0 I C
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# 74xx_IEEE_74157
|
||||
#
|
||||
DEF 74xx_IEEE_74157 U 0 30 Y Y 1 F N
|
||||
F0 "U" 300 400 50 H V C CNN
|
||||
F1 "74xx_IEEE_74157" 250 -650 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
T 0 0 100 60 0 0 0 MUX Normal 0 C C
|
||||
S -250 -400 250 -600 0 0 0 N
|
||||
S -250 -200 250 -400 0 0 0 N
|
||||
S -250 0 250 -200 0 0 0 N
|
||||
S -250 200 250 0 0 0 0 N
|
||||
P 9 0 0 0 -200 200 -200 250 -250 250 -250 500 250 500 250 250 200 250 200 200 200 200 N
|
||||
X VCC 16 150 500 0 D 50 50 0 0 W N
|
||||
X GND 8 0 500 0 D 50 50 0 0 W N
|
||||
X A/B 1 -550 300 300 R 50 50 1 1 I
|
||||
X I1d 10 -550 -550 300 R 50 50 1 1 I
|
||||
X I0d 11 -550 -450 300 R 50 50 1 1 I
|
||||
X Qc 12 550 -300 300 L 50 50 1 1 O
|
||||
X I1c 13 -550 -350 300 R 50 50 1 1 I
|
||||
X I0c 14 -550 -250 300 R 50 50 1 1 I
|
||||
X ~EN 15 -550 400 300 R 50 50 1 1 I I
|
||||
X I0a 2 -550 150 300 R 50 50 1 1 I
|
||||
X I1a 3 -550 50 300 R 50 50 1 1 I
|
||||
X Qa 4 550 100 300 L 50 50 1 1 O
|
||||
X I0b 5 -550 -50 300 R 50 50 1 1 I
|
||||
X I1b 6 -550 -150 300 R 50 50 1 1 I
|
||||
X Qb 7 550 -100 300 L 50 50 1 1 O
|
||||
X Qd 9 550 -500 300 L 50 50 1 1 O
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# 74xx_IEEE_74164
|
||||
#
|
||||
DEF 74xx_IEEE_74164 U 0 30 Y Y 1 F N
|
||||
F0 "U" 350 250 50 H V C CNN
|
||||
F1 "74xx_IEEE_74164" 250 -900 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
T 0 -170 -40 60 0 0 0 & Normal 0 C C
|
||||
S -250 -750 250 -850 0 1 0 N
|
||||
S -250 -650 250 -750 0 1 0 N
|
||||
S -250 -550 250 -650 0 1 0 N
|
||||
S -250 -450 250 -550 0 1 0 N
|
||||
S -250 -350 250 -450 0 1 0 N
|
||||
S -250 -250 250 -350 0 1 0 N
|
||||
S -250 -150 250 -250 0 1 0 N
|
||||
S -250 50 250 -150 0 1 0 N
|
||||
P 3 0 1 0 -100 50 -100 -150 -100 -150 N
|
||||
P 9 0 1 0 -200 50 -200 100 -250 100 -250 350 250 350 250 100 200 100 200 50 200 50 N
|
||||
X A 1 -550 0 300 R 50 50 1 1 I
|
||||
X Qe 10 550 -500 300 L 50 50 1 1 O
|
||||
X Qf 11 550 -600 300 L 50 50 1 1 O
|
||||
X Qg 12 550 -700 300 L 50 50 1 1 O
|
||||
X Qh 13 550 -800 300 L 50 50 1 1 O
|
||||
X Vdd 14 200 350 0 D 50 50 1 1 W N
|
||||
X B 2 -550 -100 300 R 50 50 1 1 I
|
||||
X Qa 3 550 -50 300 L 50 50 1 1 O
|
||||
X Qb 4 550 -200 300 L 50 50 1 1 O
|
||||
X Qc 5 550 -300 300 L 50 50 1 1 O
|
||||
X Qd 6 550 -400 300 L 50 50 1 1 O
|
||||
X Vss 7 0 350 0 D 50 50 1 1 W N
|
||||
X CK 8 -550 150 300 R 50 50 1 1 I C
|
||||
X ~R 9 -550 250 300 R 50 50 1 1 I I
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# 74xx_IEEE_74251
|
||||
#
|
||||
DEF 74xx_IEEE_74251 U 0 30 Y Y 1 F N
|
||||
F0 "U" 300 600 50 H V C CNN
|
||||
F1 "74xx_IEEE_74251" 350 -800 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
T 0 0 250 50 0 0 0 MUX Normal 0 C C
|
||||
S -250 650 250 -700 0 0 0 N
|
||||
P 5 0 0 0 80 -320 20 -320 50 -380 80 -320 80 -320 N
|
||||
P 5 0 0 0 80 380 20 380 50 320 80 380 80 380 N
|
||||
X VCC 16 0 650 0 D 50 50 0 0 W N
|
||||
X GND 8 0 -700 0 U 50 50 0 0 W N
|
||||
X I3 1 -550 -200 300 R 50 50 1 1 I
|
||||
X S1 10 -550 350 300 R 50 50 1 1 I
|
||||
X S0 11 -550 450 300 R 50 50 1 1 I
|
||||
X I7 12 -550 -600 300 R 50 50 1 1 I
|
||||
X I6 13 -550 -500 300 R 50 50 1 1 I
|
||||
X I5 14 -550 -400 300 R 50 50 1 1 I
|
||||
X I4 15 -550 -300 300 R 50 50 1 1 I
|
||||
X I2 2 -550 -100 300 R 50 50 1 1 I
|
||||
X I1 3 -550 0 300 R 50 50 1 1 I
|
||||
X I0 4 -550 100 300 R 50 50 1 1 I
|
||||
X Q 5 550 350 300 L 50 50 1 1 T
|
||||
X ~Q 6 550 -350 300 L 50 50 1 1 T I
|
||||
X ~E 7 -550 550 300 R 50 50 1 1 I I
|
||||
X S2 9 -550 250 300 R 50 50 1 1 I
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# 74xx_IEEE_74253
|
||||
#
|
||||
DEF 74xx_IEEE_74253 U 0 30 Y Y 1 F N
|
||||
F0 "U" 300 650 50 H V C CNN
|
||||
F1 "74xx_IEEE_74253" 150 -650 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
T 0 0 300 60 0 0 0 MUX Normal 0 C C
|
||||
S -250 -100 250 -600 0 0 0 N
|
||||
S -250 450 250 -100 0 0 0 N
|
||||
P 5 0 0 0 80 -320 20 -320 50 -380 80 -320 80 -320 N
|
||||
P 5 0 0 0 80 180 20 180 50 120 80 180 80 180 N
|
||||
P 9 0 0 0 -200 450 -200 500 -250 500 -250 750 250 750 250 500 200 500 200 450 200 450 N
|
||||
X VCC 16 150 750 0 D 50 50 0 0 W N
|
||||
X GND 8 0 750 0 D 50 50 0 0 W N
|
||||
X ~ENa 1 -550 350 300 R 50 50 1 1 I I
|
||||
X I0b 10 -550 -250 300 R 50 50 1 1 I
|
||||
X I1b 11 -550 -350 300 R 50 50 1 1 I
|
||||
X I2b 12 -550 -450 300 R 50 50 1 1 I
|
||||
X I3b 13 -550 -550 300 R 50 50 1 1 I
|
||||
X A 14 -550 650 300 R 50 50 1 1 I
|
||||
X ~ENb 15 -550 -150 300 R 50 50 1 1 I I
|
||||
X B 2 -550 550 300 R 50 50 1 1 I
|
||||
X I3a 3 -550 -50 300 R 50 50 1 1 I
|
||||
X I2a 4 -550 50 300 R 50 50 1 1 I
|
||||
X I1a 5 -550 150 300 R 50 50 1 1 I
|
||||
X I0a 6 -550 250 300 R 50 50 1 1 I
|
||||
X Qa 7 550 150 300 L 50 50 1 1 T
|
||||
X Qb 9 550 -350 300 L 50 50 1 1 T
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_D_ALT
|
||||
#
|
||||
DEF Device_D_ALT D 0 40 N N 1 F N
|
||||
F0 "D" 0 100 50 H V C CNN
|
||||
F1 "Device_D_ALT" 0 -100 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
TO-???*
|
||||
*_Diode_*
|
||||
*SingleDiode*
|
||||
D_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 8 -50 50 -50 -50 N
|
||||
P 2 0 1 0 50 0 -50 0 N
|
||||
P 4 0 1 8 50 50 50 -50 -50 0 50 50 F
|
||||
X K 1 -150 0 100 R 50 50 1 1 P
|
||||
X A 2 150 0 100 L 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_Q_NPN_BCE
|
||||
#
|
||||
DEF Device_Q_NPN_BCE Q 0 0 Y N 1 F N
|
||||
F0 "Q" 200 50 50 H V L CNN
|
||||
F1 "Device_Q_NPN_BCE" 200 -50 50 H V L CNN
|
||||
F2 "" 200 100 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
C 50 0 111 0 1 10 N
|
||||
P 2 0 1 0 25 25 100 100 N
|
||||
P 3 0 1 0 25 -25 100 -100 100 -100 N
|
||||
P 3 0 1 20 25 75 25 -75 25 -75 N
|
||||
P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
|
||||
X B 1 -200 0 225 R 50 50 1 1 I
|
||||
X C 2 100 200 100 D 50 50 1 1 P
|
||||
X E 3 100 -200 100 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_R
|
||||
#
|
||||
DEF Device_R R 0 0 N Y 1 F N
|
||||
F0 "R" 80 0 50 V V C CNN
|
||||
F1 "Device_R" 0 0 50 V V C CNN
|
||||
F2 "" -70 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GNDD
|
||||
#
|
||||
DEF power_GNDD #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GNDD" 0 -125 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
S -50 -60 50 -80 0 1 10 F
|
||||
P 2 0 1 0 0 0 0 -60 N
|
||||
X GNDD 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_VCC
|
||||
#
|
||||
DEF power_VCC #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_VCC" 0 150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
C 0 75 25 0 1 0 N
|
||||
P 2 0 1 0 0 0 0 50 N
|
||||
X VCC 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
238
ttl-fpga.pro
Normal file
238
ttl-fpga.pro
Normal file
@ -0,0 +1,238 @@
|
||||
update=Thu 30 May 2019 02:28:07 PM CEST
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=ttl-fpga.net
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
|
||||
ViaDiameter1=0.8
|
||||
ViaDrill1=0.4
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.051
|
||||
SolderMaskMinWidth=0.25
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=1
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
22
ttl-fpga.sch
Normal file
22
ttl-fpga.sch
Normal file
@ -0,0 +1,22 @@
|
||||
EESchema Schematic File Version 4
|
||||
EELAYER 29 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 3
|
||||
Title "DISCRETE TTL FPGA"
|
||||
Date ""
|
||||
Rev "01"
|
||||
Comp "Markus Koch <markus@notsyncing.net>"
|
||||
Comment1 "PCB"
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Sheet
|
||||
S 4450 2100 3050 1050
|
||||
U 5D77FDBE
|
||||
F0 "LogicBlock" 50
|
||||
F1 "logic_block.sch" 50
|
||||
$EndSheet
|
||||
$EndSCHEMATC
|
||||
Loading…
Reference in New Issue
Block a user