electronics/ttl-fpga
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Add option to generate binary or ASCII hex bitstreams

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This commit is contained in:
Markus Koch 2019-06-21 21:16:46 +02:00
parent 7df813fc71
commit ae2e6552ce
3 changed files with 23 additions and 9 deletions
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6
sw/kousaten/src/fpga.c
View File

@ -5,7 +5,7 @@
#include <string.h> #include <string.h>
int fpga_generate_bitstream(struct fpga_chain *chain, int fpga_generate_bitstream(struct fpga_chain *chain,
char *filename) char *filename, int ascii)
{ {
int i; int i;
char *buf = NULL; char *buf = NULL;
@ -37,8 +37,12 @@ int fpga_generate_bitstream(struct fpga_chain *chain,
goto fail; goto fail;
} }
for (int j = 0; j < chain->head[i]->type->isp_length; ++j) { for (int j = 0; j < chain->head[i]->type->isp_length; ++j) {
if (ascii)
fprintf(bitstream, "%02X ", buf[j] & 0xFF); fprintf(bitstream, "%02X ", buf[j] & 0xFF);
else
fputc(buf[j] & 0xFF, bitstream);
} }
if (ascii)
fprintf(bitstream, "\n"); fprintf(bitstream, "\n");
free(buf); free(buf);
} }

2
sw/kousaten/src/fpga.h
View File

@ -3,6 +3,6 @@
#include "fpga_cell.h" #include "fpga_cell.h"
int fpga_generate_bitstream(struct fpga_chain *chain, int fpga_generate_bitstream(struct fpga_chain *chain,
char *filename); char *filename, int ascii);
#endif // FPGA_H #endif // FPGA_H

20
sw/kousaten/src/main.c
View File

@ -18,10 +18,11 @@ int development_test_main(int argc, char *argv[])
char *fdef_filename = "fdef/4x4.fdef"; char *fdef_filename = "fdef/4x4.fdef";
char *kst_filename = "-"; char *kst_filename = "-";
char *bitstream_filename = "-"; char *bitstream_filename = "-";
int bitstream_ascii = 0;
set_log_level(LL_DEBUG); set_log_level(LL_DEBUG);
while((opt = getopt(argc, argv, "f:i:o:")) != -1) while((opt = getopt(argc, argv, "f:i:o:a")) != -1)
{ {
switch(opt) switch(opt)
{ {
@ -35,11 +36,20 @@ int development_test_main(int argc, char *argv[])
case 'o': case 'o':
bitstream_filename = optarg; bitstream_filename = optarg;
break; break;
case 'h':
bitstream_ascii = 1;
break;
case ':': case ':':
case '?': case '?':
printf("Usage: %s [-f fdef] [-i input.kst] [-o output.bin]", printf("Usage: %s [-f fdef] [-i input.kst] [-o output.bin] [-h]\n"
"Generate bitstreams for the TTL-FPGA.\n\n"
"When INPUT or OUTPUT is -, read/write standard input.\n\n"
" -f\tFDEF FPGA description file, default fdef/4x4.fdef\n"
" -i\tKousaten input file, default stdin\n"
" -o\tOutput file, default stdout\n"
" -a\tGenerate output as ASCII HEX\n",
argv[0]); argv[0]);
break; return 0;
default: default:
break; break;
} }
@ -62,9 +72,9 @@ int development_test_main(int argc, char *argv[])
/* TODO: Configure application specific logic */ /* TODO: Configure application specific logic */
((struct fpga_cell_lut34 *)(entry_cell->cell_connections[RIGHT]))->lut_in_sel[0] = 'A'; ((struct fpga_cell_lut34 *)(entry_cell->cell_connections[RIGHT]))->lut_in_sel[0] = 'A';
((struct fpga_cell_lut34 *)(entry_cell->cell_connections[RIGHT]))->drive_sel[0] = 'C'; ((struct fpga_cell_lut34 *)(entry_cell->cell_connections[RIGHT]))->drive_sel[0] = 'C';
((struct fpga_cell_lut34 *)(entry_cell->cell_connections[RIGHT]))->LUT4 = 0; ((struct fpga_cell_lut34 *)(entry_cell->cell_connections[RIGHT]))->LUT4 = 0x0F;
if (fpga_generate_bitstream(chain, bitstream_filename)) { if (fpga_generate_bitstream(chain, bitstream_filename, bitstream_ascii)) {
report(LL_ERROR, "Bitstream generation failed."); report(LL_ERROR, "Bitstream generation failed.");
return E_BITSTREAM; return E_BITSTREAM;
} }