Commit Graph

24 Commits

Author SHA1 Message Date
f27c728472 sw: Implement bodgefix for schematic rev 03L 2019-09-22 19:11:43 +02:00
30c83a658f sw: Fix fpga_cell_lut34_lut_get_out_mux
Was accessing wrong data when generating info for set 2.
2019-09-22 19:11:21 +02:00
0a493bdd2a Remove unnecessary debug output 2019-09-13 13:02:05 +09:00
a072dbfe8a Fix unnecessary semicolon warnings in bit set / unset macros 2019-09-13 12:59:24 +09:00
a2abccfc5d Fix output MUX selection logic
Fixes #15.
2019-09-13 12:55:32 +09:00
7abcead6a9 des: Fix data type of drive_sel 2019-09-13 12:48:28 +09:00
f60d76f831 Fix sync polarity
Fixes #11.
2019-06-29 12:48:26 +02:00
9a06c054e8 Fix bitstream generator collision check 2019-06-29 12:37:59 +02:00
0de1c093cd Add program.sh script 2019-06-22 17:47:20 +02:00
15fe4e4ca3 Add test configuration for 2-bit counter 2019-06-22 17:24:44 +02:00
6846aff71d Add debug print for bitstream bits 2019-06-22 17:24:26 +02:00
01df956317 Fix a variety of bugs found during integration 2019-06-22 17:24:09 +02:00
28adf2340b Add FDEF for single-cell FPGA 2019-06-21 21:17:32 +02:00
ae2e6552ce Add option to generate binary or ASCII hex bitstreams 2019-06-21 21:16:46 +02:00
7df813fc71 Add argument parsing 2019-06-21 20:57:56 +02:00
0834cf0c0d Finish basic bitstream generator 2019-06-21 20:31:34 +02:00
5d86f8c7cf Start bitstream generator 2019-06-20 13:45:04 +02:00
a1d635889c Clean up 2019-06-19 18:32:59 +02:00
925e17372a Implement fpga_isp_chain_new 2019-06-19 18:25:21 +02:00
d0fed3cce4 Implement ISP chain walker 2019-06-18 20:15:35 +02:00
cf80ff7b6b Reverse order of log levels 2019-06-17 22:08:24 +02:00
0309934d82 Add comments for later cleanups 2019-06-17 22:08:11 +02:00
e12120fade Start implementing Kousaten 2019-06-16 21:27:42 +02:00
0072ed418b Initialize CMakeProject for Kousaten 2019-06-16 17:11:20 +02:00