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ttl-fpga
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Building an FPGA from 74-series logic ICs. For fun and education.
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80 Commits
2 Branches
2 Tags
762 KiB
KiCad Layout 81.9%
KiCad Schematic 15.8%
C 2.3%
 
 
 
Branch: sw
master
sw
rev01
rev02
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ttl-fpga/sw/kousaten/src
History
Markus Koch 30e18b4357
sw: Add 16-bit counter demo
3 years ago
..
fpga.c Add option to generate binary or ASCII hex bitstreams 3 years ago
fpga.h Add option to generate binary or ASCII hex bitstreams 3 years ago
fpga_cell.c Fix bitstream generator collision check 3 years ago
fpga_cell.h Finish basic bitstream generator 3 years ago
fpga_cell_lut34.c sw: Fix coding style 3 years ago
fpga_cell_lut34.h des: Fix data type of drive_sel 3 years ago
fpga_cell_none.c Implement ISP chain walker 3 years ago
fpga_cell_none.h Implement ISP chain walker 3 years ago
fpga_cell_wire.c Implement fpga_isp_chain_new 3 years ago
fpga_cell_wire.h Implement ISP chain walker 3 years ago
fpga_fdef_loader.c Implement ISP chain walker 3 years ago
fpga_fdef_loader.h Start implementing Kousaten 3 years ago
fpga_global.c Clean up 3 years ago
fpga_global.h Finish basic bitstream generator 3 years ago
main.c sw: Add 16-bit counter demo 3 years ago
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