156 lines
6.9 KiB
Bash
156 lines
6.9 KiB
Bash
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# (C) 2001-2016 Altera Corporation. All rights reserved.
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# Your use of Altera Corporation's design tools, logic functions and
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# other software and tools, and its AMPP partner logic functions, and
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# any output files any of the foregoing (including device programming
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# or simulation files), and any associated documentation or information
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# are expressly subject to the terms and conditions of the Altera
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# Program License Subscription Agreement, Altera MegaCore Function
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# License Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by Altera
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# or its authorized distributors. Please refer to the applicable
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# agreement for further details.
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# ACDS 15.1 185 linux 2016.01.17.15:36:30
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# ----------------------------------------
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# vcsmx - auto-generated simulation script
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# ----------------------------------------
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# This script can be used to simulate the following IP:
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# ddr3
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# To create a top-level simulation script which compiles other
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# IP, and manages other system issues, copy the following template
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# and adapt it to your needs:
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#
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# # Start of template
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# # If the copied and modified template file is "vcsmx_sim.sh", run it as:
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# # ./vcsmx_sim.sh
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# #
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# # Do the file copy, dev_com and com steps
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# source vcsmx_setup.sh \
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# SKIP_ELAB=1 \
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# SKIP_SIM=1
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#
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# # Compile the top level module
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# vlogan +v2k +systemverilogext+.sv "$QSYS_SIMDIR/../top.sv"
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#
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# # Do the elaboration and sim steps
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# # Override the top-level name
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# # Override the user-defined sim options, so the simulation runs
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# # forever (until $finish()).
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# source vcsmx_setup.sh \
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# SKIP_FILE_COPY=1 \
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# SKIP_DEV_COM=1 \
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# SKIP_COM=1 \
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# TOP_LEVEL_NAME="'-top top'" \
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# USER_DEFINED_SIM_OPTIONS=""
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# # End of template
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# ----------------------------------------
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# If ddr3 is one of several IP cores in your
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# Quartus project, you can generate a simulation script
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# suitable for inclusion in your top-level simulation
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# script by running the following command line:
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#
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# ip-setup-simulation --quartus-project=<quartus project>
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#
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# ip-setup-simulation will discover the Altera IP
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# within the Quartus project, and generate a unified
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# script which supports all the Altera IP within the design.
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# ----------------------------------------
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# ACDS 15.1 185 linux 2016.01.17.15:36:30
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# ----------------------------------------
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# initialize variables
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TOP_LEVEL_NAME="ddr3"
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QSYS_SIMDIR="./../../"
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QUARTUS_INSTALL_DIR="/opt/altera/15.1/quartus/"
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SKIP_FILE_COPY=0
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SKIP_DEV_COM=0
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SKIP_COM=0
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SKIP_ELAB=0
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SKIP_SIM=0
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USER_DEFINED_ELAB_OPTIONS=""
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USER_DEFINED_SIM_OPTIONS="+vcs+finish+100"
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# ----------------------------------------
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# overwrite variables - DO NOT MODIFY!
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# This block evaluates each command line argument, typically used for
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# overwriting variables. An example usage:
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# sh <simulator>_setup.sh SKIP_ELAB=1 SKIP_SIM=1
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for expression in "$@"; do
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eval $expression
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if [ $? -ne 0 ]; then
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echo "Error: This command line argument, \"$expression\", is/has an invalid expression." >&2
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exit $?
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fi
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done
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# ----------------------------------------
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# initialize simulation properties - DO NOT MODIFY!
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ELAB_OPTIONS=""
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SIM_OPTIONS=""
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if [[ `vcs -platform` != *"amd64"* ]]; then
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:
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else
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:
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fi
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# ----------------------------------------
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# create compilation libraries
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mkdir -p ./libraries/work/
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mkdir -p ./libraries/pll0/
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mkdir -p ./libraries/ddr3/
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mkdir -p ./libraries/altera/
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mkdir -p ./libraries/lpm/
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mkdir -p ./libraries/sgate/
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mkdir -p ./libraries/altera_mf/
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mkdir -p ./libraries/altera_lnsim/
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mkdir -p ./libraries/cyclonev/
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# ----------------------------------------
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# copy RAM/ROM files to simulation directory
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# ----------------------------------------
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# compile device library files
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if [ $SKIP_DEV_COM -eq 0 ]; then
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_syn_attributes.vhd" -work altera
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_standard_functions.vhd" -work altera
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/alt_dspbuilder_package.vhd" -work altera
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_europa_support_lib.vhd" -work altera
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives_components.vhd" -work altera
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.vhd" -work altera
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/220pack.vhd" -work lpm
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.vhd" -work lpm
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate_pack.vhd" -work sgate
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.vhd" -work sgate
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf_components.vhd" -work altera_mf
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.vhd" -work altera_mf
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vlogan +v2k -sverilog $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv" -work altera_lnsim
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim_components.vhd" -work altera_lnsim
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vlogan +v2k $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/synopsys/cyclonev_atoms_ncrypt.v" -work cyclonev
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/cyclonev_atoms.vhd" -work cyclonev
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vhdlan $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/cyclonev_components.vhd" -work cyclonev
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fi
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# ----------------------------------------
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# compile design files in correct order
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if [ $SKIP_COM -eq 0 ]; then
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vhdlan -xlrm $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/ddr3/ddr3_pll0.vho" -work pll0
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vhdlan -xlrm $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/ddr3/ddr3_pll0_sim_delay.vhd" -work pll0
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vhdlan -xlrm $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/ddr3/ddr3_0002.vhd" -work ddr3
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vhdlan -xlrm $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/ddr3.vhd"
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fi
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# ----------------------------------------
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# elaborate top level design
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if [ $SKIP_ELAB -eq 0 ]; then
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vcs -lca -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS $TOP_LEVEL_NAME
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fi
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# ----------------------------------------
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# simulate
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if [ $SKIP_SIM -eq 0 ]; then
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./simv $SIM_OPTIONS $USER_DEFINED_SIM_OPTIONS
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fi
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