61 lines
1.7 KiB
Coq
61 lines
1.7 KiB
Coq
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// (C) 2001-2015 Altera Corporation. All rights reserved.
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// Your use of Altera Corporation's design tools, logic functions and other
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// software and tools, and its AMPP partner logic functions, and any output
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// files any of the foregoing (including device programming or simulation
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// files), and any associated documentation or information are expressly subject
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// to the terms and conditions of the Altera Program License Subscription
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// Agreement, Altera MegaCore Function License Agreement, or other applicable
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// license agreement, including, without limitation, that your use is for the
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// sole purpose of programming logic devices manufactured by Altera and sold by
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// Altera or its authorized distributors. Please refer to the applicable
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// agreement for further details.
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`timescale 1 ps / 1 ps
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module ddr3_p0_iss_probe (
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probe_input
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);
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parameter WIDTH = 1;
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parameter ID_NAME = "PROB";
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input [WIDTH-1:0] probe_input;
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altsource_probe iss_probe_inst (
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.probe (probe_input),
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.source ()
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// synopsys translate_off
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,
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.clr (),
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.ena (),
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.ir_in (),
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.ir_out (),
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.jtag_state_cdr (),
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.jtag_state_cir (),
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.jtag_state_e1dr (),
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.jtag_state_sdr (),
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.jtag_state_tlr (),
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.jtag_state_udr (),
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.jtag_state_uir (),
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.raw_tck (),
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.source_clk (),
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.source_ena (),
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.tdi (),
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.tdo (),
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.usr1 ()
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// synopsys translate_on
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);
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defparam
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iss_probe_inst.enable_metastability = "NO",
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iss_probe_inst.instance_id = ID_NAME,
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iss_probe_inst.probe_width = WIDTH,
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iss_probe_inst.sld_auto_instance_index = "YES",
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iss_probe_inst.sld_instance_index = 0,
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iss_probe_inst.source_initial_value = "0",
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iss_probe_inst.source_width = 0;
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endmodule
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