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202df5380b
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flashrom: Added code to enforce a cs inactive delay between SPI transactions
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2016-12-05 20:35:35 +01:00 |
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e66c98a670
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flashrom: Transmitted one clock cycle too long -> buffer shifted
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2016-12-04 17:58:27 +01:00 |
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9b379e70fe
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flashrom: Changed SPI core to conform to DataFlash behavior, changed main fsm to request the right number of transactions
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2016-08-04 20:59:43 +02:00 |
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a1efcf62c4
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Initial commit
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2016-08-04 19:22:38 +02:00 |
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