fpga/mor1kx-bemicrocv
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Softcore system for the bemicro cv development board using the OpenRisc Mor1kx processor.
28 Commits 1 Branch 0 Tags 1,010 KiB
Verilog 42.1%
SystemVerilog 24.8%
VHDL 14.3%
C 9.2%
Tcl 6.5%
Other 3%
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Markus Koch af2cad643b Bugfix in WB-AVL converter; it now accepts WB transactions with no STB inactive cycle
2017-03-02 12:19:04 +01:00
.settings Initial commit 2016-08-04 19:22:38 +02:00
bench Added prelim. GPIO 2017-03-02 08:51:53 +01:00
cores Converted UART to Wishbone v3 2017-03-02 09:29:41 +01:00
datasets Initial commit 2016-08-04 19:22:38 +02:00
design Bugfix in WB-AVL converter; it now accepts WB transactions with no STB inactive cycle 2017-03-02 12:19:04 +01:00
devicemodels dataflash-model: some reformatting and removed timing checks 2016-08-04 21:00:36 +02:00
ip Added address masking to crossbar switch 2017-03-02 09:31:05 +01:00
quartus Added prelim. GPIO 2017-03-02 08:51:53 +01:00
wave Rewrote SPI PHY -> Flash ROM works now 2017-03-01 19:08:01 +01:00
.gitignore Initial commit 2016-08-04 19:22:38 +02:00
.library_mapping.xml Initial commit 2016-08-04 19:22:38 +02:00
.project Initial commit 2016-08-04 19:22:38 +02:00
compile.do Initial commit 2016-08-04 19:22:38 +02:00