156 lines
6.9 KiB
Bash
Executable File
156 lines
6.9 KiB
Bash
Executable File
|
|
# (C) 2001-2016 Altera Corporation. All rights reserved.
|
|
# Your use of Altera Corporation's design tools, logic functions and
|
|
# other software and tools, and its AMPP partner logic functions, and
|
|
# any output files any of the foregoing (including device programming
|
|
# or simulation files), and any associated documentation or information
|
|
# are expressly subject to the terms and conditions of the Altera
|
|
# Program License Subscription Agreement, Altera MegaCore Function
|
|
# License Agreement, or other applicable license agreement, including,
|
|
# without limitation, that your use is for the sole purpose of
|
|
# programming logic devices manufactured by Altera and sold by Altera
|
|
# or its authorized distributors. Please refer to the applicable
|
|
# agreement for further details.
|
|
|
|
# ACDS 15.1 185 linux 2016.01.17.15:36:30
|
|
|
|
# ----------------------------------------
|
|
# ncsim - auto-generated simulation script
|
|
|
|
# ----------------------------------------
|
|
# This script can be used to simulate the following IP:
|
|
# ddr3
|
|
# To create a top-level simulation script which compiles other
|
|
# IP, and manages other system issues, copy the following template
|
|
# and adapt it to your needs:
|
|
#
|
|
# # Start of template
|
|
# # If the copied and modified template file is "ncsim.sh", run it as:
|
|
# # ./ncsim.sh
|
|
# #
|
|
# # Do the file copy, dev_com and com steps
|
|
# source ncsim_setup.sh \
|
|
# SKIP_ELAB=1 \
|
|
# SKIP_SIM=1
|
|
#
|
|
# # Compile the top level module
|
|
# ncvlog -sv "$QSYS_SIMDIR/../top.sv"
|
|
#
|
|
# # Do the elaboration and sim steps
|
|
# # Override the top-level name
|
|
# # Override the user-defined sim options, so the simulation
|
|
# # runs forever (until $finish()).
|
|
# source ncsim_setup.sh \
|
|
# SKIP_FILE_COPY=1 \
|
|
# SKIP_DEV_COM=1 \
|
|
# SKIP_COM=1 \
|
|
# TOP_LEVEL_NAME=top \
|
|
# USER_DEFINED_SIM_OPTIONS=""
|
|
# # End of template
|
|
# ----------------------------------------
|
|
# If ddr3 is one of several IP cores in your
|
|
# Quartus project, you can generate a simulation script
|
|
# suitable for inclusion in your top-level simulation
|
|
# script by running the following command line:
|
|
#
|
|
# ip-setup-simulation --quartus-project=<quartus project>
|
|
#
|
|
# ip-setup-simulation will discover the Altera IP
|
|
# within the Quartus project, and generate a unified
|
|
# script which supports all the Altera IP within the design.
|
|
# ----------------------------------------
|
|
# ACDS 15.1 185 linux 2016.01.17.15:36:30
|
|
# ----------------------------------------
|
|
# initialize variables
|
|
TOP_LEVEL_NAME="ddr3"
|
|
QSYS_SIMDIR="./../"
|
|
QUARTUS_INSTALL_DIR="/opt/altera/15.1/quartus/"
|
|
SKIP_FILE_COPY=0
|
|
SKIP_DEV_COM=0
|
|
SKIP_COM=0
|
|
SKIP_ELAB=0
|
|
SKIP_SIM=0
|
|
USER_DEFINED_ELAB_OPTIONS=""
|
|
USER_DEFINED_SIM_OPTIONS="-input \"@run 100; exit\""
|
|
|
|
# ----------------------------------------
|
|
# overwrite variables - DO NOT MODIFY!
|
|
# This block evaluates each command line argument, typically used for
|
|
# overwriting variables. An example usage:
|
|
# sh <simulator>_setup.sh SKIP_ELAB=1 SKIP_SIM=1
|
|
for expression in "$@"; do
|
|
eval $expression
|
|
if [ $? -ne 0 ]; then
|
|
echo "Error: This command line argument, \"$expression\", is/has an invalid expression." >&2
|
|
exit $?
|
|
fi
|
|
done
|
|
|
|
# ----------------------------------------
|
|
# initialize simulation properties - DO NOT MODIFY!
|
|
ELAB_OPTIONS=""
|
|
SIM_OPTIONS=""
|
|
if [[ `ncsim -version` != *"ncsim(64)"* ]]; then
|
|
:
|
|
else
|
|
:
|
|
fi
|
|
|
|
# ----------------------------------------
|
|
# create compilation libraries
|
|
mkdir -p ./libraries/work/
|
|
mkdir -p ./libraries/pll0/
|
|
mkdir -p ./libraries/ddr3/
|
|
mkdir -p ./libraries/altera/
|
|
mkdir -p ./libraries/lpm/
|
|
mkdir -p ./libraries/sgate/
|
|
mkdir -p ./libraries/altera_mf/
|
|
mkdir -p ./libraries/altera_lnsim/
|
|
mkdir -p ./libraries/cyclonev/
|
|
|
|
# ----------------------------------------
|
|
# copy RAM/ROM files to simulation directory
|
|
|
|
# ----------------------------------------
|
|
# compile device library files
|
|
if [ $SKIP_DEV_COM -eq 0 ]; then
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_syn_attributes.vhd" -work altera
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_standard_functions.vhd" -work altera
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/alt_dspbuilder_package.vhd" -work altera
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_europa_support_lib.vhd" -work altera
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives_components.vhd" -work altera
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.vhd" -work altera
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/220pack.vhd" -work lpm
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.vhd" -work lpm
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate_pack.vhd" -work sgate
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.vhd" -work sgate
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf_components.vhd" -work altera_mf
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.vhd" -work altera_mf
|
|
ncvlog -sv $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv" -work altera_lnsim
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim_components.vhd" -work altera_lnsim
|
|
ncvlog $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/cadence/cyclonev_atoms_ncrypt.v" -work cyclonev
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/cyclonev_atoms.vhd" -work cyclonev
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/cyclonev_components.vhd" -work cyclonev
|
|
fi
|
|
|
|
# ----------------------------------------
|
|
# compile design files in correct order
|
|
if [ $SKIP_COM -eq 0 ]; then
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/ddr3/ddr3_pll0.vho" -work pll0 -cdslib ./cds_libs/pll0.cds.lib
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/ddr3/ddr3_pll0_sim_delay.vhd" -work pll0 -cdslib ./cds_libs/pll0.cds.lib
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/ddr3/ddr3_0002.vhd" -work ddr3 -cdslib ./cds_libs/ddr3.cds.lib
|
|
ncvhdl -v93 $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/ddr3.vhd"
|
|
fi
|
|
|
|
# ----------------------------------------
|
|
# elaborate top level design
|
|
if [ $SKIP_ELAB -eq 0 ]; then
|
|
ncelab -access +w+r+c -namemap_mixgen -relax $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS $TOP_LEVEL_NAME
|
|
fi
|
|
|
|
# ----------------------------------------
|
|
# simulate
|
|
if [ $SKIP_SIM -eq 0 ]; then
|
|
eval ncsim -licqueue $SIM_OPTIONS $USER_DEFINED_SIM_OPTIONS $TOP_LEVEL_NAME
|
|
fi
|