rgboard/bench_top.gtkw

81 lines
10 KiB
Plaintext

[*]
[*] GTKWave Analyzer v3.3.86 (w)1999-2017 BSI
[*] Sun Jan 21 17:51:06 2018
[*]
[dumpfile] "/tmp/SigasiCompileCache7616390032050217445/ws2812-wall/mentor/bench_top.ghw"
[dumpfile_mtime] "Sun Jan 21 17:50:57 2018"
[dumpfile_size] 5545813
[savefile] "/home/markus/workspaceSigasi/ws2812-wall/bench_top.gtkw"
[timestart] 1288000000000
[size] 1920 1043
[pos] -1 -1
*-34.891136 1372229144711 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] top.
[treeopen] top.bench_top.
[treeopen] top.bench_top.top_inst.
[treeopen] top.bench_top.top_inst.uart_rx_inst.
[sst_width] 267
[signals_width] 261
[sst_expanded] 1
[sst_vpaned_height] 298
@420
top.bench_top.top_inst.renderer_state
@28
top.bench_top.top_inst.render_stb
top.bench_top.top_inst.rst
top.bench_top.top_inst.clk
top.bench_top.top_inst.rst_hw
top.bench_top.top_inst.clk_hw
@c00022
#{top.bench_top.ws2812_out[6:0]} top.bench_top.ws2812_out[3] top.bench_top.ws2812_out[2] top.bench_top.ws2812_out[1] top.bench_top.ws2812_out[0]
@28
top.bench_top.ws2812_out[3]
top.bench_top.ws2812_out[2]
top.bench_top.ws2812_out[1]
top.bench_top.ws2812_out[0]
@1401200
-group_end
@22
#{top.bench_top.top_inst.renderer_data[167:0]} top.bench_top.top_inst.renderer_data[95] top.bench_top.top_inst.renderer_data[94] top.bench_top.top_inst.renderer_data[93] top.bench_top.top_inst.renderer_data[92] top.bench_top.top_inst.renderer_data[91] top.bench_top.top_inst.renderer_data[90] top.bench_top.top_inst.renderer_data[89] top.bench_top.top_inst.renderer_data[88] top.bench_top.top_inst.renderer_data[87] top.bench_top.top_inst.renderer_data[86] top.bench_top.top_inst.renderer_data[85] top.bench_top.top_inst.renderer_data[84] top.bench_top.top_inst.renderer_data[83] top.bench_top.top_inst.renderer_data[82] top.bench_top.top_inst.renderer_data[81] top.bench_top.top_inst.renderer_data[80] top.bench_top.top_inst.renderer_data[79] top.bench_top.top_inst.renderer_data[78] top.bench_top.top_inst.renderer_data[77] top.bench_top.top_inst.renderer_data[76] top.bench_top.top_inst.renderer_data[75] top.bench_top.top_inst.renderer_data[74] top.bench_top.top_inst.renderer_data[73] top.bench_top.top_inst.renderer_data[72] top.bench_top.top_inst.renderer_data[71] top.bench_top.top_inst.renderer_data[70] top.bench_top.top_inst.renderer_data[69] top.bench_top.top_inst.renderer_data[68] top.bench_top.top_inst.renderer_data[67] top.bench_top.top_inst.renderer_data[66] top.bench_top.top_inst.renderer_data[65] top.bench_top.top_inst.renderer_data[64] top.bench_top.top_inst.renderer_data[63] top.bench_top.top_inst.renderer_data[62] top.bench_top.top_inst.renderer_data[61] top.bench_top.top_inst.renderer_data[60] top.bench_top.top_inst.renderer_data[59] top.bench_top.top_inst.renderer_data[58] top.bench_top.top_inst.renderer_data[57] top.bench_top.top_inst.renderer_data[56] top.bench_top.top_inst.renderer_data[55] top.bench_top.top_inst.renderer_data[54] top.bench_top.top_inst.renderer_data[53] top.bench_top.top_inst.renderer_data[52] top.bench_top.top_inst.renderer_data[51] top.bench_top.top_inst.renderer_data[50] top.bench_top.top_inst.renderer_data[49] top.bench_top.top_inst.renderer_data[48] top.bench_top.top_inst.renderer_data[47] top.bench_top.top_inst.renderer_data[46] top.bench_top.top_inst.renderer_data[45] top.bench_top.top_inst.renderer_data[44] top.bench_top.top_inst.renderer_data[43] top.bench_top.top_inst.renderer_data[42] top.bench_top.top_inst.renderer_data[41] top.bench_top.top_inst.renderer_data[40] top.bench_top.top_inst.renderer_data[39] top.bench_top.top_inst.renderer_data[38] top.bench_top.top_inst.renderer_data[37] top.bench_top.top_inst.renderer_data[36] top.bench_top.top_inst.renderer_data[35] top.bench_top.top_inst.renderer_data[34] top.bench_top.top_inst.renderer_data[33] top.bench_top.top_inst.renderer_data[32] top.bench_top.top_inst.renderer_data[31] top.bench_top.top_inst.renderer_data[30] top.bench_top.top_inst.renderer_data[29] top.bench_top.top_inst.renderer_data[28] top.bench_top.top_inst.renderer_data[27] top.bench_top.top_inst.renderer_data[26] top.bench_top.top_inst.renderer_data[25] top.bench_top.top_inst.renderer_data[24] top.bench_top.top_inst.renderer_data[23] top.bench_top.top_inst.renderer_data[22] top.bench_top.top_inst.renderer_data[21] top.bench_top.top_inst.renderer_data[20] top.bench_top.top_inst.renderer_data[19] top.bench_top.top_inst.renderer_data[18] top.bench_top.top_inst.renderer_data[17] top.bench_top.top_inst.renderer_data[16] top.bench_top.top_inst.renderer_data[15] top.bench_top.top_inst.renderer_data[14] top.bench_top.top_inst.renderer_data[13] top.bench_top.top_inst.renderer_data[12] top.bench_top.top_inst.renderer_data[11] top.bench_top.top_inst.renderer_data[10] top.bench_top.top_inst.renderer_data[9] top.bench_top.top_inst.renderer_data[8] top.bench_top.top_inst.renderer_data[7] top.bench_top.top_inst.renderer_data[6] top.bench_top.top_inst.renderer_data[5] top.bench_top.top_inst.renderer_data[4] top.bench_top.top_inst.renderer_data[3] top.bench_top.top_inst.renderer_data[2] top.bench_top.top_inst.renderer_data[1] top.bench_top.top_inst.renderer_data[0]
@800022
#{top.bench_top.top_inst.pixdata_next[6:0]} top.bench_top.top_inst.pixdata_next[3] top.bench_top.top_inst.pixdata_next[2] top.bench_top.top_inst.pixdata_next[1] top.bench_top.top_inst.pixdata_next[0]
@28
top.bench_top.top_inst.pixdata_next[3]
top.bench_top.top_inst.pixdata_next[2]
top.bench_top.top_inst.pixdata_next[1]
top.bench_top.top_inst.pixdata_next[0]
@1001200
-group_end
@800022
#{top.bench_top.top_inst.pixdata_valid[6:0]} top.bench_top.top_inst.pixdata_valid[3] top.bench_top.top_inst.pixdata_valid[2] top.bench_top.top_inst.pixdata_valid[1] top.bench_top.top_inst.pixdata_valid[0]
@28
top.bench_top.top_inst.pixdata_valid[3]
top.bench_top.top_inst.pixdata_valid[2]
top.bench_top.top_inst.pixdata_valid[1]
top.bench_top.top_inst.pixdata_valid[0]
@1001200
-group_end
@420
top.bench_top.top_inst.controller_state
@28
top.bench_top.top_inst.uart_rx
@420
top.bench_top.top_inst.uart_rx_inst.state
top.bench_top.top_inst.uart_rx_inst.bitcounter
@22
#{top.bench_top.top_inst.uart_rx_inst.clkdivider[15:0]} top.bench_top.top_inst.uart_rx_inst.clkdivider[15] top.bench_top.top_inst.uart_rx_inst.clkdivider[14] top.bench_top.top_inst.uart_rx_inst.clkdivider[13] top.bench_top.top_inst.uart_rx_inst.clkdivider[12] top.bench_top.top_inst.uart_rx_inst.clkdivider[11] top.bench_top.top_inst.uart_rx_inst.clkdivider[10] top.bench_top.top_inst.uart_rx_inst.clkdivider[9] top.bench_top.top_inst.uart_rx_inst.clkdivider[8] top.bench_top.top_inst.uart_rx_inst.clkdivider[7] top.bench_top.top_inst.uart_rx_inst.clkdivider[6] top.bench_top.top_inst.uart_rx_inst.clkdivider[5] top.bench_top.top_inst.uart_rx_inst.clkdivider[4] top.bench_top.top_inst.uart_rx_inst.clkdivider[3] top.bench_top.top_inst.uart_rx_inst.clkdivider[2] top.bench_top.top_inst.uart_rx_inst.clkdivider[1] top.bench_top.top_inst.uart_rx_inst.clkdivider[0]
@28
top.bench_top.top_inst.uart_rx_stb
@22
#{top.bench_top.top_inst.uart_rx_data[7:0]} top.bench_top.top_inst.uart_rx_data[7] top.bench_top.top_inst.uart_rx_data[6] top.bench_top.top_inst.uart_rx_data[5] top.bench_top.top_inst.uart_rx_data[4] top.bench_top.top_inst.uart_rx_data[3] top.bench_top.top_inst.uart_rx_data[2] top.bench_top.top_inst.uart_rx_data[1] top.bench_top.top_inst.uart_rx_data[0]
@29
top.bench_top.top_inst.controller_ram_we
@420
top.bench_top.top_inst.byte_cnt
@22
#{top.bench_top.top_inst.sr[167:0]} top.bench_top.top_inst.sr[95] top.bench_top.top_inst.sr[94] top.bench_top.top_inst.sr[93] top.bench_top.top_inst.sr[92] top.bench_top.top_inst.sr[91] top.bench_top.top_inst.sr[90] top.bench_top.top_inst.sr[89] top.bench_top.top_inst.sr[88] top.bench_top.top_inst.sr[87] top.bench_top.top_inst.sr[86] top.bench_top.top_inst.sr[85] top.bench_top.top_inst.sr[84] top.bench_top.top_inst.sr[83] top.bench_top.top_inst.sr[82] top.bench_top.top_inst.sr[81] top.bench_top.top_inst.sr[80] top.bench_top.top_inst.sr[79] top.bench_top.top_inst.sr[78] top.bench_top.top_inst.sr[77] top.bench_top.top_inst.sr[76] top.bench_top.top_inst.sr[75] top.bench_top.top_inst.sr[74] top.bench_top.top_inst.sr[73] top.bench_top.top_inst.sr[72] top.bench_top.top_inst.sr[71] top.bench_top.top_inst.sr[70] top.bench_top.top_inst.sr[69] top.bench_top.top_inst.sr[68] top.bench_top.top_inst.sr[67] top.bench_top.top_inst.sr[66] top.bench_top.top_inst.sr[65] top.bench_top.top_inst.sr[64] top.bench_top.top_inst.sr[63] top.bench_top.top_inst.sr[62] top.bench_top.top_inst.sr[61] top.bench_top.top_inst.sr[60] top.bench_top.top_inst.sr[59] top.bench_top.top_inst.sr[58] top.bench_top.top_inst.sr[57] top.bench_top.top_inst.sr[56] top.bench_top.top_inst.sr[55] top.bench_top.top_inst.sr[54] top.bench_top.top_inst.sr[53] top.bench_top.top_inst.sr[52] top.bench_top.top_inst.sr[51] top.bench_top.top_inst.sr[50] top.bench_top.top_inst.sr[49] top.bench_top.top_inst.sr[48] top.bench_top.top_inst.sr[47] top.bench_top.top_inst.sr[46] top.bench_top.top_inst.sr[45] top.bench_top.top_inst.sr[44] top.bench_top.top_inst.sr[43] top.bench_top.top_inst.sr[42] top.bench_top.top_inst.sr[41] top.bench_top.top_inst.sr[40] top.bench_top.top_inst.sr[39] top.bench_top.top_inst.sr[38] top.bench_top.top_inst.sr[37] top.bench_top.top_inst.sr[36] top.bench_top.top_inst.sr[35] top.bench_top.top_inst.sr[34] top.bench_top.top_inst.sr[33] top.bench_top.top_inst.sr[32] top.bench_top.top_inst.sr[31] top.bench_top.top_inst.sr[30] top.bench_top.top_inst.sr[29] top.bench_top.top_inst.sr[28] top.bench_top.top_inst.sr[27] top.bench_top.top_inst.sr[26] top.bench_top.top_inst.sr[25] top.bench_top.top_inst.sr[24] top.bench_top.top_inst.sr[23] top.bench_top.top_inst.sr[22] top.bench_top.top_inst.sr[21] top.bench_top.top_inst.sr[20] top.bench_top.top_inst.sr[19] top.bench_top.top_inst.sr[18] top.bench_top.top_inst.sr[17] top.bench_top.top_inst.sr[16] top.bench_top.top_inst.sr[15] top.bench_top.top_inst.sr[14] top.bench_top.top_inst.sr[13] top.bench_top.top_inst.sr[12] top.bench_top.top_inst.sr[11] top.bench_top.top_inst.sr[10] top.bench_top.top_inst.sr[9] top.bench_top.top_inst.sr[8] top.bench_top.top_inst.sr[7] top.bench_top.top_inst.sr[6] top.bench_top.top_inst.sr[5] top.bench_top.top_inst.sr[4] top.bench_top.top_inst.sr[3] top.bench_top.top_inst.sr[2] top.bench_top.top_inst.sr[1] top.bench_top.top_inst.sr[0]
@28
top.bench_top.top_inst.controller_ram_addr[0]
[pattern_trace] 1
[pattern_trace] 0