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fpga/trashernet
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Code Issues 5 Pull Requests Releases 2 Wiki Activity
103 Commits 5 Branches 2 Tags
Commit Graph

6 Commits

Author SHA1 Message Date
Markus Koch
1a41120afa bench: Clarify HWITL interface creation for local testing 2022-10-27 17:02:53 +02:00
Markus Koch
3c1c14f953 bench: hw_itl: Add debug prints for RX/TX 2022-05-15 14:37:21 +02:00
Markus Koch
4b4e5fdbfa bench: hw_itl: Calculate and append FCS for incoming frames 2022-05-13 18:20:13 +02:00
Markus Koch
0e80900426 bench: hw_itl: Add comments 2022-05-13 18:19:35 +02:00
Markus Koch
82d4e6808b bench: hwitl: Fix design to HW comms
Forgot to remove the sync header.
2022-04-30 12:48:39 +02:00
Markus Koch
1c281bc0f7 bench: Add hardware-in-the-loop test 2022-04-29 20:53:20 +02:00
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