15 lines
406 B
VHDL
15 lines
406 B
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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package trashernet_types is
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subtype byte is std_logic_vector(7 downto 0);
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type byte_vector is array (natural range <>) of byte;
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subtype mac_addr_t is byte_vector(0 to 5);
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subtype ip_addr_t is byte_vector(0 to 3);
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subtype ethertype_t is byte_vector(0 to 1);
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end package trashernet_types;
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package body trashernet_types is
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end package body trashernet_types;
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