2021-02-23 19:05:43 +01:00
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#include "adc.h"
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#include <stm32f4xx_adc.h>
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#include <stm32f4xx_rcc.h>
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#include <stm32f4xx_dma.h>
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#include <stdio.h>
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#include "systems.h"
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#include <stm32f4xx.h>
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volatile uint16_t adc_buffer[2] = {0,};
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void adc_init()
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{
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ADC_CommonInitTypeDef ADC_CommonInitStruct;
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ADC_InitTypeDef ADC_InitStructure;
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GPIO_InitTypeDef GPIO_InitStruct;
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// Enable Clocks
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM5, ENABLE);
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RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_DMA1, ENABLE);
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// Set up GPIO
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GPIO_InitStruct.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN;
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GPIO_Init(GPIOA, &GPIO_InitStruct);
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// Set up timer
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TIM_TimeBaseInitTypeDef Timer_InitStruct;
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TIM_TimeBaseStructInit(&Timer_InitStruct);
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Timer_InitStruct.TIM_Prescaler = 0;
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Timer_InitStruct.TIM_CounterMode = TIM_CounterMode_Up;
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Timer_InitStruct.TIM_Period = (ADC_F_TIM / ADC_SAMPLE_RATE);
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Timer_InitStruct.TIM_ClockDivision = TIM_CKD_DIV1;
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Timer_InitStruct.TIM_RepetitionCounter = 0;
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TIM_TimeBaseInit(TIM5, &Timer_InitStruct);
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TIM_Cmd(TIM5, ENABLE);
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TIM_OCInitTypeDef TIM_OCInitStructure;
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TIM_OCStructInit (&TIM_OCInitStructure);
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TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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TIM_OCInitStructure.TIM_OCIdleState = TIM_OCNIdleState_Reset;
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TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Active;
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TIM_OC1Init (TIM5, &TIM_OCInitStructure);
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TIM_SetCompare1(TIM5, 0xFFFF);
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TIM_ITConfig(TIM5, TIM_IT_CC1, ENABLE);
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TIM_CCxCmd(TIM5, TIM_Channel_1, TIM_CCx_Enable);
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TIM_CCxNCmd(TIM5, TIM_Channel_1, TIM_CCx_Enable);
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NVIC_InitTypeDef NVIC_InitStruct;
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NVIC_InitStruct.NVIC_IRQChannel = TIM5_IRQn;
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NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0x00;
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NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0x00;
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NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStruct);
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// Set up DMA
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DMA_InitTypeDef DMA_InitStruct;
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DMA_StructInit(&DMA_InitStruct);
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DMA_DeInit(ADC_RX_DMA_STREAM);
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DMA_InitStruct.DMA_Channel = ADC_RX_DMA_CHANNEL;
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DMA_InitStruct.DMA_PeripheralBaseAddr = (uint32_t) & (ADC1->DR);
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DMA_InitStruct.DMA_Memory0BaseAddr = (uint32_t)adc_buffer;
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DMA_InitStruct.DMA_DIR = DMA_DIR_PeripheralToMemory;
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DMA_InitStruct.DMA_BufferSize = 2;
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DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
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DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
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DMA_InitStruct.DMA_Mode = DMA_Mode_Circular;
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DMA_InitStruct.DMA_Priority = DMA_Priority_High;
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DMA_InitStruct.DMA_FIFOMode = DMA_FIFOMode_Disable;
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DMA_InitStruct.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
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DMA_InitStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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DMA_Init(ADC_RX_DMA_STREAM, &DMA_InitStruct);
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DMA_ITConfig(ADC_RX_DMA_STREAM, DMA_IT_TC, ENABLE);
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NVIC_InitStruct.NVIC_IRQChannel = ADC_RX_DMA_IRQn;
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NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0x00;
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NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0x00;
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NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStruct);
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DMA_Cmd(ADC_RX_DMA_STREAM, ENABLE);
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// Set up ADC
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ADC_DeInit();
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ADC_CommonStructInit(&ADC_CommonInitStruct);
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ADC_CommonInitStruct.ADC_Mode = ADC_Mode_Independent;
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ADC_CommonInitStruct.ADC_Prescaler = ADC_Prescaler_Div8;
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ADC_CommonInitStruct.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
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ADC_CommonInitStruct.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_20Cycles;
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ADC_CommonInit(&ADC_CommonInitStruct);
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ADC_StructInit(&ADC_InitStructure);
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ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
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ADC_InitStructure.ADC_ScanConvMode = ENABLE;
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ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
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ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; // TODO: trig via event
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ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T5_CC1;
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ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
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ADC_InitStructure.ADC_NbrOfConversion = 2;
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ADC_Init(ADC1, &ADC_InitStructure);
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ADC_ITConfig(ADC1, ADC_IT_EOC, ENABLE);
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NVIC_InitStruct.NVIC_IRQChannel = ADC_IRQn;
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NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0x00;
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NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0x00;
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NVIC_InitStruct.NVIC_IRQChannelCmd = DISABLE; // !
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NVIC_Init(&NVIC_InitStruct);
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ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
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ADC_EOCOnEachRegularChannelCmd(ADC1, DISABLE);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 1, ADC_SampleTime_28Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 2, ADC_SampleTime_28Cycles);
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// Turn it all on
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ADC_Cmd(ADC1, ENABLE);
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ADC_DMACmd(ADC1, ENABLE);
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}
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void DMA2_Stream0_IRQHandler()
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{
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int sample;
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DMA_ClearFlag(ADC_RX_DMA_STREAM, DMA_FLAG_TCIF0);
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2021-03-01 19:11:56 +01:00
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sample = ((adc_buffer[0] + adc_buffer[1]) / 2) - 2048;
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2021-02-23 19:05:43 +01:00
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GotSample(sample);
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}
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2021-03-01 19:11:56 +01:00
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// Only for debugging. Currently disabled.
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2021-02-23 19:05:43 +01:00
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void ADC_IRQHandler()
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{
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ADC_ClearFlag(ADC1, ADC_FLAG_EOC);
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2021-03-01 19:11:56 +01:00
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// printf("[ADC-IRQ] %d, %d\r\n", adc_buffer[0], adc_buffer[1]);
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2021-02-23 19:05:43 +01:00
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}
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void TIM5_IRQHandler()
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{
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TIM_ClearFlag(TIM5, TIM_FLAG_CC1);
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// I would really like to this in HW via events, but somehow it's broken...
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2021-03-01 19:11:56 +01:00
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2021-02-23 19:05:43 +01:00
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ADC_SoftwareStartConv(ADC1);
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}
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