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fpga: trashernet_phy_wb: Ensure LEDs blink even with constant traffic

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Markus Koch 2024-08-01 21:10:53 +02:00
parent 74280fb79a
commit eddbcf5f6f
1 changed files with 20 additions and 13 deletions
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27
fpga/hdl/design/trashernet_phy_wb.vhd
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@ -220,34 +220,41 @@ begin
x"000" & "0" & (not tx_fifo_empty) & (not rx_fifo_empty) & phy_out.carrier_detect); x"000" & "0" & (not tx_fifo_empty) & (not rx_fifo_empty) & phy_out.carrier_detect);
ledstretch : process(clk) is ledstretch : process(clk) is
constant CMAX : integer := integer(0.2 / (1.0 / real(F_CLK))); constant CMAX : integer := integer(0.1 / (1.0 / real(F_CLK)));
variable cnt : integer range 0 to CMAX; constant CMIN : integer := -integer(0.1 / (1.0 / real(F_CLK)));
variable cnt : integer range CMIN to CMAX;
begin begin
if rising_edge(clk) then if rising_edge(clk) then
if cnt = 0 then if cnt = CMIN then
led_rx <= phy_out.carrier_detect; led_rx <= phy_out.carrier_detect;
if phy_out.rx_active then if phy_out.rx_active then
cnt := CMAX; cnt := CMAX;
led_rx <= not phy_out.carrier_detect;
end if; end if;
elsif cnt = 0 then
led_rx <= phy_out.carrier_detect;
cnt := cnt - 1;
else else
led_rx <= '0';
cnt := cnt - 1; cnt := cnt - 1;
end if; end if;
end if; end if;
end process ledstretch; end process ledstretch;
ledstretch2 : process(clk) is ledstretch2 : process(clk) is
constant CMAX : integer := integer(0.2 / (1.0 / real(F_CLK))); constant CMAX : integer := integer(0.1 / (1.0 / real(F_CLK)));
variable cnt : integer range 0 to CMAX; constant CMIN : integer := -integer(0.1 / (1.0 / real(F_CLK)));
variable cnt : integer range CMIN to CMAX;
begin begin
if rising_edge(clk) then if rising_edge(clk) then
if cnt = 0 then if cnt = CMIN then
led_tx <= '0';
if phy_out.tx_active then if phy_out.tx_active then
cnt := CMAX; cnt := CMAX;
end if;
else
led_tx <= '1'; led_tx <= '1';
end if;
elsif cnt = 0 then
led_tx <= '0';
cnt := cnt - 1;
else
cnt := cnt - 1; cnt := cnt - 1;
end if; end if;
end if; end if;