PCB, FPGA, and SW design to implement a tiny Ethernet-connected SoC based on SERV + Trashernet
Markus Koch
d75c373da7
Most of the basic SoC drivers are copied from the official SERV source code and have only been adapted. This commit also adds device tree files and other definitions to support the Trashernet hardware. A preliminary driver (polling-based) for the Trashernet Ethernet module is also included. |
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|---|---|---|
| fpga | ||
| kicad | ||
| sw/bootrom | ||
| tools | ||
| zephyr | ||
| .gitmodules | ||
| LICENSE-CC-BY-SA-4.0.TXT | ||
| LICENSE-MPL-2.0.txt | ||
| README.MD | ||
Trashernet SoC
PCB, FPGA, and SW design to implement a tiny Ethernet-connected SoC based on SERV + Trashernet.
License
Trashernet SoC, Copyright (C) 2024 Markus Koch markus@notsyncing.net
Hardware
The PCB design in /kicad is released under a Creative Commons Attribution-ShareAlike 4.0 International license.
You can find a copy of the full license in LICENSE-CC-BY-SA-4.0.TXT.
FPGA
The FPGA Source Code Form in /fpga is subject to the terms of the Mozilla Public License, v. 2.0.
You can find a copy of the full license in LICENSE-MPL-2.0.txt.
Note that this design incorporates code from third-party projects, which may come with further restrictions. For details, refer to the individual projects's licensing terms:
- SERV: ISC License
- Trashernet: Mozilla Public License, v. 2.0.
SW
TBD.