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trashernet-soc
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d75c373da7
trashernet-soc
/
fpga
/
hdl
History
Markus Koch
b8f273c9b6
fpga: bench: Add bench to run larger programs from external RAM
2024-11-08 16:06:04 +01:00
..
bench
fpga: bench: Add bench to run larger programs from external RAM
2024-11-08 16:06:04 +01:00
design
fpga: top: Refactor indentation
2024-11-08 15:52:46 +01:00
device_models
fpga: aps6404l device model: Print message instead of failing for out of bounds accesses
2024-11-08 10:29:07 +01:00
generics
fpga: Clean up clocking code
2024-08-09 14:01:16 +02:00
neorv32
@
fd79163eb2
fpga: Add NEORV32 as alternative CPU core
2024-09-27 14:44:28 +02:00
serv
@
086090046c
fpga: Implement basic SERV SoC
2024-06-22 11:28:15 +02:00
trashernet
@
206332f3d1
fpga: Implement functional Ethernet controller
2024-07-23 19:13:42 +02:00
header.sh
fpga: Implement basic SERV SoC
2024-06-22 11:28:15 +02:00