doc: Add IPv4 modules to doc
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@ -6,6 +6,7 @@ Trashernet is a very trashy Ethernet stack for FPGAs written in VHDL aiming to c
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* Layer 1, Physical: `trashernet_phy`
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* Layer 1, Physical: `trashernet_phy`
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* Layer 2, Data link: `trashernet_mac`, `trashernet_eth`, `trashernet_arp`
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* Layer 2, Data link: `trashernet_mac`, `trashernet_eth`, `trashernet_arp`
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* Layer 3, Network: `trashernet_ipv4`, `trashernet_ipv4prot`, `trashernet_icmp`
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When writing it, the following were the main design philosophies:
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When writing it, the following were the main design philosophies:
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