arp: Reformat code

This commit is contained in:
Markus Koch 2022-10-29 19:19:16 +02:00
parent a5d5ca280d
commit 3240f363ba

View File

@ -61,6 +61,7 @@ architecture rtl of trashernet_arp is
signal arp_rx_reply_stb : std_logic; -- An ARP reply was received (strobe) signal arp_rx_reply_stb : std_logic; -- An ARP reply was received (strobe)
signal arp_rx_sha : mac_addr_t; -- The MAC address of the reply sender, valid with arp_rx_reply signal arp_rx_sha : mac_addr_t; -- The MAC address of the reply sender, valid with arp_rx_reply
signal arp_rx_spa : ip_addr_t; -- The IP address of the reply sender, valid with arp_rx_reply signal arp_rx_spa : ip_addr_t; -- The IP address of the reply sender, valid with arp_rx_reply
begin begin
resolver : block resolver : block
type resolver_state_t is (IDLE, QUERY_MAC); type resolver_state_t is (IDLE, QUERY_MAC);
@ -80,7 +81,7 @@ begin
replied_ip <= (others => x"00"); -- 0.0.0.0 replied_ip <= (others => x"00"); -- 0.0.0.0
arp_out.arp_ok_stb <= '0'; arp_out.arp_ok_stb <= '0';
arp_out.arp_fail_stb <= '0'; arp_out.arp_fail_stb <= '0';
arp_tx_request_rq <= '0'; arp_tx_request_rq <= '0';
elsif rising_edge(clk) then elsif rising_edge(clk) then
arp_out.arp_ok_stb <= '0'; arp_out.arp_ok_stb <= '0';
@ -109,14 +110,15 @@ begin
arp_tx_request_rq <= '0'; arp_tx_request_rq <= '0';
end if; end if;
if query_mac_found or query_timeout then if query_mac_found or query_timeout then
arp_out.arp_ok_stb <= query_mac_found; arp_out.arp_ok_stb <= query_mac_found;
arp_out.arp_fail_stb <= not query_mac_found; arp_out.arp_fail_stb <= not query_mac_found;
state <= IDLE; state <= IDLE;
end if; end if;
end case; end case;
end if; end if;
end process arp_resolver_main; end process arp_resolver_main;
query_mac_found <= '1' when (arp_tx_request_tpa = replied_ip) else '0'; query_mac_found <= '1' when (arp_tx_request_tpa = replied_ip) else '0';
arp_out.arp_mac <= replied_mac; arp_out.arp_mac <= replied_mac;
arp_tx_request_tpa <= arp_in.arp_ip; arp_tx_request_tpa <= arp_in.arp_ip;
@ -272,7 +274,7 @@ begin
tx_fsm : process(clk, rst) is tx_fsm : process(clk, rst) is
begin begin
if rst then if rst then
arp_tx_reply_ack <= '0'; arp_tx_reply_ack <= '0';
arp_tx_request_ack <= '0'; arp_tx_request_ack <= '0';
elsif rising_edge(clk) then elsif rising_edge(clk) then
@ -287,14 +289,14 @@ begin
case state is case state is
when IDLE => when IDLE =>
if arp_tx_reply_rq then if arp_tx_reply_rq then
state <= TRANSMIT; state <= TRANSMIT;
arp_tx_reply_ack <= '1'; arp_tx_reply_ack <= '1';
sr <= arp_reply_preload; sr <= arp_reply_preload;
ethernet_ii_in.tx_mac_address <= arp_tx_reply_tha; ethernet_ii_in.tx_mac_address <= arp_tx_reply_tha;
elsif arp_tx_request_rq then elsif arp_tx_request_rq then
state <= TRANSMIT; state <= TRANSMIT;
arp_tx_request_ack <= '1'; arp_tx_request_ack <= '1';
sr <= arp_request_preload; sr <= arp_request_preload;
ethernet_ii_in.tx_mac_address <= MAC_ADDR_BROADCAST; ethernet_ii_in.tx_mac_address <= MAC_ADDR_BROADCAST;
end if; end if;
@ -308,8 +310,8 @@ begin
end if; end if;
end process tx_fsm; end process tx_fsm;
ethernet_ii_in.tx_en <= '1' when state = TRANSMIT else '0'; ethernet_ii_in.tx_en <= '1' when state = TRANSMIT else '0';
ethernet_ii_in.tx_data <= sr(0); ethernet_ii_in.tx_data <= sr(0);
end block tx; end block tx;
end architecture rtl; end architecture rtl;