bench: Use VUnit
Well, not really. This just makes it compile and work with VUNIT, but it's not a real VUnit test bench. Will do that at some other point.
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.gitignore
vendored
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vunit_out
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@ -18,7 +18,13 @@ use work.bench_pkg.all;
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library trashernet;
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library trashernet;
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use trashernet.trashernet_pkg.all;
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use trashernet.trashernet_pkg.all;
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library vunit_lib;
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context vunit_lib.vunit_context;
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entity bench_trashernet_mac is
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entity bench_trashernet_mac is
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generic(
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runner_cfg : string
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);
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end entity bench_trashernet_mac;
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end entity bench_trashernet_mac;
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architecture bench of bench_trashernet_mac is
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architecture bench of bench_trashernet_mac is
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@ -37,6 +43,8 @@ architecture bench of bench_trashernet_mac is
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constant TEST_BENCH_LOOPBACK : boolean := true;
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constant TEST_BENCH_LOOPBACK : boolean := true;
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signal mac_tx_start : std_logic := '0';
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begin
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begin
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trashernet_phy_cdc_inst : entity trashernet.trashernet_phy_cdc
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trashernet_phy_cdc_inst : entity trashernet.trashernet_phy_cdc
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generic map(
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generic map(
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@ -144,6 +152,8 @@ begin
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mac_tx : process is
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mac_tx : process is
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begin
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begin
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wait on mac_tx_start;
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mac_in.tx_mac_data <= x"11";
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mac_in.tx_mac_data <= x"11";
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mac_in.tx_header.mac_destination <= (x"12", x"23", x"34", x"45", x"56", x"67");
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mac_in.tx_header.mac_destination <= (x"12", x"23", x"34", x"45", x"56", x"67");
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mac_in.tx_header.mac_source <= (x"a2", x"a3", x"a4", x"a5", x"a6", x"a7");
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mac_in.tx_header.mac_source <= (x"a2", x"a3", x"a4", x"a5", x"a6", x"a7");
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@ -159,8 +169,27 @@ begin
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wait until rising_edge(mac_out.tx_mac_data_ack);
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wait until rising_edge(mac_out.tx_mac_data_ack);
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wait until rising_edge(clk);
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wait until rising_edge(clk);
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mac_in.tx_mac_data_en <= '0';
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mac_in.tx_mac_data_en <= '0';
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wait;
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end process mac_tx;
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end process mac_tx;
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test : process is
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begin
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wait for 1 ns;
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test_runner_setup(runner, runner_cfg);
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while test_suite loop
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if run("mac_tx_rx_simple") then
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mac_tx_start <= not mac_tx_start;
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wait on mac_out.rx_mac_crc_ok, mac_out.rx_mac_crc_error for 1 ms;
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assert mac_out.rx_mac_crc_ok = '1' report "Did not receive CRC OK" severity error;
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end if;
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end loop;
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wait for 1 ns;
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wait until rising_edge(clk);
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test_runner_cleanup(runner);
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end process test;
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end architecture bench;
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end architecture bench;
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16
run.py
Executable file
16
run.py
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#!/usr/bin/env python
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from vunit import VUnit
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import os
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library_names = ["trashernet", "bench"]
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libs = {}
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vu = VUnit.from_argv()
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for library_name in library_names:
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libs[library_name] = vu.add_library(library_name)
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libs[library_name].add_source_files(os.path.join(library_name, "*.vhd"))
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vu.main()
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