eth: Add Ethernet type MUX
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trashernet/trashernet_eth.vhd
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170
trashernet/trashernet_eth.vhd
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-- -------------------------------------------------------------------------- --
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-- TRASHERNET - A Trashy Ethernet Stack for FPGAs --
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-- -------------------------------------------------------------------------- --
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-- trashernet_eth.vhd : Ethernet OSI Layer 2, Data Link, ETH I/II Ethertype
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-- Implements arbitration of different ethertypes.
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-- -------------------------------------------------------------------------- --
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-- Author : Markus Koch <markus@notsyncing.net>
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-- Contributors : None
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-- License : Mozilla Public License (MPL) Version 2
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-- -------------------------------------------------------------------------- --
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.trashernet_pkg.all;
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entity trashernet_eth is
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generic(
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ETHERNET_II_PROTOCOLS : ethernet_ii_protocol_vector := ETHERNET_II_PROTOCOLS_NONE
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);
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port(
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-- Global
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clk : in std_logic; -- Global clock
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rst : in std_logic; -- Asynchronous reset
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-- MAC application interface
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mac_out : in mac_out_t; -- MAC application IF (out of MAC)
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mac_in : out mac_in_t; -- MAC application IF (into MAC)
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-- Configuration
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config : in configuration_t; -- Global Trashernet configuration
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-- Ethernet 802.3 application interface
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ethernet_i_out : out ethernet_i_out_t; -- Ethernet 802.3 IF (out from MAC)
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ethernet_i_in : in ethernet_i_in_t := ETHERNET_I_IN_UNUSED; -- Ethernet 802.3 IF (out from MAC)
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-- Ethernet II application interface
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ethernet_ii_out : out ethernet_ii_out_vector(ETHERNET_II_PROTOCOLS'range); -- Ethernet II IF (out from MAC)
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ethernet_ii_in : in ethernet_ii_in_vector(ETHERNET_II_PROTOCOLS'range) := (others => ETHERNET_II_IN_UNUSED) -- Ethernet II IF (into MAC)
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);
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end entity trashernet_eth;
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architecture rtl of trashernet_eth is
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signal tx_data_ack_ii : std_logic_vector(ethernet_ii_out'range);
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signal tx_data_ack_i : std_logic;
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begin
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rx : block
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constant SEL_ETH_I : integer := ethernet_ii_out'low - 1;
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constant SEL_ETH_NONE : integer := ethernet_ii_out'low - 2;
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signal sel : integer range SEL_ETH_NONE to ethernet_ii_out'high;
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signal mac_destination_matches : std_logic;
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signal rx_mac_header_rcv_delayed : std_logic;
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begin
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mac_destination_matches <= '1' when --
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((mac_out.rx_header.mac_destination = (x"FF", x"FF", x"FF", x"FF", x"FF", x"FF")) or --
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(mac_out.rx_header.mac_destination = config.mac_address)) else
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'0';
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mux : process(clk, rst) is
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begin
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if rst then
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sel <= SEL_ETH_NONE;
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rx_mac_header_rcv_delayed <= '0';
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elsif rising_edge(clk) then
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rx_mac_header_rcv_delayed <= mac_out.rx_mac_header_rcv;
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if mac_out.rx_mac_header_rcv then
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sel <= SEL_ETH_NONE; -- By default, let's assume it's not for us
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if mac_destination_matches then
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if (unsigned(std_logic_vector'(mac_out.rx_header.mac_ethertype(0) & mac_out.rx_header.mac_ethertype(1))) < 1500) then -- Ethernet 802.3 Frame
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sel <= SEL_ETH_I;
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else -- Ethernet II Frame
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for i in ETHERNET_II_PROTOCOLS'range loop
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if (mac_out.rx_header.mac_ethertype = ETHERNET_II_PROTOCOLS(i).ethertype) then
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sel <= i;
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end if;
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end loop;
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end if;
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end if;
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end if;
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end if;
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end process mux;
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-- Shared fields in the Ethernet II application interface
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shared_fields : for i in ethernet_ii_out'range generate
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ethernet_ii_out(i).rx_mac_address <= mac_out.rx_header.mac_source;
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ethernet_ii_out(i).rx_data <= mac_out.rx_mac_data;
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ethernet_ii_out(i).rx_data_valid <= mac_out.rx_mac_valid when sel = i else '0';
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ethernet_ii_out(i).rx_crc_error <= mac_out.rx_mac_crc_error when sel = i else '0';
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ethernet_ii_out(i).rx_crc_ok <= mac_out.rx_mac_crc_ok when sel = i else '0';
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ethernet_ii_out(i).rx_header_rcv <= rx_mac_header_rcv_delayed when sel = i else '0';
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end generate shared_fields;
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-- Shared fields in the Ethernet application interface
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ethernet_i_out.rx_data <= mac_out.rx_mac_data;
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ethernet_i_out.rx_data_valid <= mac_out.rx_mac_valid when sel = SEL_ETH_I;
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ethernet_i_out.rx_crc_error <= mac_out.rx_mac_crc_error when sel = SEL_ETH_I else '0';
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ethernet_i_out.rx_crc_ok <= mac_out.rx_mac_crc_ok when sel = SEL_ETH_I else '0';
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ethernet_i_out.rx_header_rcv <= rx_mac_header_rcv_delayed when sel = SEL_ETH_I else '0';
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ethernet_i_out.rx_mac_address <= mac_out.rx_header.mac_source;
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ethernet_i_out.rx_length <= unsigned(mac_out.rx_header.mac_ethertype(0)) & unsigned(mac_out.rx_header.mac_ethertype(1));
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-- TX fields (need to be driven here to avoid multiple drivers (blocks drive ALL signals of a record))
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tx_fields : for i in ethernet_ii_out'range generate
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ethernet_ii_out(i).tx_data_ack <= tx_data_ack_ii(i);
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end generate;
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ethernet_i_out.tx_data_ack <= tx_data_ack_i;
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end block rx;
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tx : block
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type state_t is (IDLE, TXD);
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signal state : state_t;
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constant SEL_ETH_I : integer := ethernet_ii_out'low - 1;
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signal sel : integer range SEL_ETH_I to ethernet_ii_in'high;
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begin
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arb : process(clk, rst) is
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begin
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if rst then
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elsif rising_edge(clk) then
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case state is
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when IDLE =>
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if mac_out.tx_active then
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if (ethernet_i_in.tx_en) then -- ETH I has priority
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sel <= SEL_ETH_I;
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state <= TXD;
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else
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for i in ethernet_ii_in'range loop
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if ethernet_ii_in(i).tx_en then
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sel <= i;
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state <= TXD;
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exit; -- Prioritize according to vector
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end if;
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end loop;
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end if;
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end if;
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when TXD =>
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state <= IDLE when (mac_in.tx_mac_data_en or mac_out.tx_active);
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end case;
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end if;
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end process arb;
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mux : process(all) is
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begin
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if (sel = SEL_ETH_I) then
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mac_in.tx_mac_data_en <= ethernet_i_in.tx_en;
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mac_in.tx_mac_data <= ethernet_i_in.tx_data;
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tx_data_ack_i <= mac_out.tx_mac_data_ack;
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mac_in.tx_header.mac_destination <= ethernet_i_in.tx_mac_address;
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mac_in.tx_header.mac_ethertype <= byte(ethernet_i_in.tx_length(15 downto 8)) & byte(ethernet_i_in.tx_length(7 downto 0));
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else
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mac_in.tx_mac_data_en <= ethernet_ii_in(sel).tx_en;
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mac_in.tx_mac_data <= ethernet_ii_in(sel).tx_data;
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txack : for i in ethernet_ii_out'range loop
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tx_data_ack_ii(i) <= mac_out.tx_mac_data_ack when sel = i else '0';
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end loop txack;
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mac_in.tx_header.mac_destination <= ethernet_ii_in(sel).tx_mac_address;
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mac_in.tx_header.mac_ethertype <= ETHERNET_II_PROTOCOLS(sel).ethertype;
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end if;
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mac_in.tx_header.mac_source <= config.mac_address;
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end process mux;
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end block tx;
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end architecture rtl;
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@ -10,6 +10,7 @@
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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package trashernet_pkg is
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-- General types
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@ -70,6 +71,51 @@ package trashernet_pkg is
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rx_mac_crc_error : std_logic; -- End of packet, CRC invalid
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end record mac_out_t;
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-- MAC ETH interface
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type ethernet_ii_protocol_t is record
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ethertype : ethertype_t;
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end record;
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type ethernet_ii_protocol_vector is array (natural range <>) of ethernet_ii_protocol_t;
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constant ETHERNET_II_PROTOCOLS_NONE : ethernet_ii_protocol_vector(0 to -1) := (others => (ethertype => (x"00", x"00"))); -- NULL range
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constant ETHERNET_II_PROTOCOL_IP : ethernet_ii_protocol_t := (ethertype => (x"08", x"00"));
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constant ETHERNET_II_PROTOCOL_ARP : ethernet_ii_protocol_t := (ethertype => (x"08", x"06"));
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type ethernet_i_out_t is record
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rx_mac_address : mac_addr_t; -- Source MAC address
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rx_crc_ok : std_logic; -- End of packet, CRC OK
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rx_crc_error : std_logic; -- End of packet, CRC invalid
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rx_data : byte; -- RX data
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rx_data_valid : std_logic; -- RX data valid strobe
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rx_length : unsigned(15 downto 0); -- RX payload length in bytes
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rx_header_rcv : std_logic; -- Start of reception, `rx_length` is valid
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tx_data_ack : std_logic; -- Give next data byte or disable `tx_en`
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end record;
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type ethernet_i_in_t is record
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tx_mac_address : mac_addr_t; -- Destination MAC address
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tx_data : byte; -- TX data
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tx_en : std_logic; -- Start and continue transmitting
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tx_length : unsigned(15 downto 0); -- TX payload length in bytes
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end record;
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constant ETHERNET_I_IN_UNUSED : ethernet_i_in_t := (tx_mac_address => (others => x"00"), tx_data => x"00", tx_length => x"0000", others => '0'); -- TODO
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type ethernet_ii_out_t is record
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rx_mac_address : mac_addr_t; -- Source MAC address
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rx_data : byte; -- RX data
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rx_data_valid : std_logic; -- RX data valid strobe
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rx_crc_ok : std_logic; -- End of packet, CRC OK
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rx_crc_error : std_logic; -- End of packet, CRC invalid
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rx_header_rcv : std_logic; -- Start of reception
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tx_data_ack : std_logic; -- Give next data byte or disable `tx_en`
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end record;
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type ethernet_ii_in_t is record
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tx_mac_address : mac_addr_t; -- Destination MAC address
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tx_data : byte; -- TX data
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tx_en : std_logic; -- Start and continue transmitting
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end record;
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type ethernet_ii_out_vector is array (natural range <>) of ethernet_ii_out_t;
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type ethernet_ii_in_vector is array (natural range <>) of ethernet_ii_in_t;
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constant ETHERNET_II_IN_UNUSED : ethernet_ii_in_t := (tx_mac_address => (others => x"00"), tx_data => x"00", others => '0');
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end package trashernet_pkg;
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package body trashernet_pkg is
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