Clean up code formatting
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@ -54,8 +54,7 @@ begin
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);
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-- strobify
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b_toggle_last <= '0' when b_rst
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else b_toggle when rising_edge(b_clk)
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;
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b_toggle_last <= '0' when b_rst else
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b_toggle when rising_edge(b_clk);
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b_out <= (b_toggle ?/= b_toggle_last);
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end architecture rtl;
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@ -56,7 +56,7 @@ begin
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signal bit_cnt : integer range 0 to 7;
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-- NLP supervision
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constant NLP_TIMEOUT_CNT_MAX : integer := integer(round(real(F_CLK) * 16.0 * 10.0**(-3))); -- Every 16 ms
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constant NLP_TIMEOUT_CNT_MAX : integer := integer(round(real(F_CLK) * 16.0 * 10.0 ** (-3))); -- Every 16 ms
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signal nlp_timeout_cnt : integer range 0 to NLP_TIMEOUT_CNT_MAX;
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begin
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-- Synchronize RX input
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