Fix code formatting

bench/bench_crc.vhd

@@ -1,3 +1,13 @@
+-- -------------------------------------------------------------------------- --
+--               TRASHERNET - A Trashy Ethernet Stack for FPGAs               --
+-- -------------------------------------------------------------------------- --
+-- bench_crc.vhd : Stimulus-only test bench for the CRC
+-- -------------------------------------------------------------------------- --
+-- Author       : Markus Koch <markus@notsyncing.net>
+-- Contributors : None
+-- License      : Mozilla Public License (MPL) Version 2
+-- -------------------------------------------------------------------------- --
+
 library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;

bench/bench_pkg.vhd

@@ -1,3 +1,13 @@
+-- -------------------------------------------------------------------------- --
+--               TRASHERNET - A Trashy Ethernet Stack for FPGAs               --
+-- -------------------------------------------------------------------------- --
+-- bench_pkg.vhd : Types and functions used for the benches
+-- -------------------------------------------------------------------------- --
+-- Author       : Markus Koch <markus@notsyncing.net>
+-- Contributors : None
+-- License      : Mozilla Public License (MPL) Version 2
+-- -------------------------------------------------------------------------- --
+
 library ieee;
 use ieee.std_logic_1164.all;
 

bench/bench_trashernet_mac.vhd

@@ -1,3 +1,14 @@
+-- -------------------------------------------------------------------------- --
+--               TRASHERNET - A Trashy Ethernet Stack for FPGAs               --
+-- -------------------------------------------------------------------------- --
+-- bench_trashernet_mac.vhd : Stimulus-only test bench for the MAC+PHY parts
+--   Tests TX path through the RX path. Not great, but whatever.
+-- -------------------------------------------------------------------------- --
+-- Author       : Markus Koch <markus@notsyncing.net>
+-- Contributors : None
+-- License      : Mozilla Public License (MPL) Version 2
+-- -------------------------------------------------------------------------- --
+
 library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;

bench/bench_trashernet_phy.vhd

@@ -1,3 +1,14 @@
+-- -------------------------------------------------------------------------- --
+--               TRASHERNET - A Trashy Ethernet Stack for FPGAs               --
+-- -------------------------------------------------------------------------- --
+-- bench_trashernet_phy.vhd : Stimulus-only test bench for the PHY part
+--   Tests only the RX path.
+-- -------------------------------------------------------------------------- --
+-- Author       : Markus Koch <markus@notsyncing.net>
+-- Contributors : None
+-- License      : Mozilla Public License (MPL) Version 2
+-- -------------------------------------------------------------------------- --
+
 library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;

trashernet/cdc_strobe.vhd

@@ -1,3 +1,13 @@
+-- -------------------------------------------------------------------------- --
+--               TRASHERNET - A Trashy Ethernet Stack for FPGAs               --
+-- -------------------------------------------------------------------------- --
+-- cdc_strobe.vhd : CDC for strobe-signals
+--   Make sure to leave enough(TM) time between strobes.
+-- -------------------------------------------------------------------------- --
+-- Author       : Markus Koch <markus@notsyncing.net>
+-- Contributors : None
+-- License      : Mozilla Public License (MPL) Version 2
+-- -------------------------------------------------------------------------- --
 library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;

trashernet/crc.vhd

@@ -1,3 +1,13 @@
+-- -------------------------------------------------------------------------- --
+--               TRASHERNET - A Trashy Ethernet Stack for FPGAs               --
+-- -------------------------------------------------------------------------- --
+-- crc.vhd : Generic CRC implementation
+-- -------------------------------------------------------------------------- --
+-- Author       : Markus Koch <markus@notsyncing.net>
+-- Contributors : None
+-- License      : Mozilla Public License (MPL) Version 2
+-- -------------------------------------------------------------------------- --
+
 library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;

trashernet/synchronizer.vhd

@@ -1,3 +1,13 @@
+-- -------------------------------------------------------------------------- --
+--               TRASHERNET - A Trashy Ethernet Stack for FPGAs               --
+-- -------------------------------------------------------------------------- --
+-- synchronizer.vhd : Basic shift-register based synchronizer
+-- -------------------------------------------------------------------------- --
+-- Author       : Markus Koch <markus@notsyncing.net>
+-- Contributors : None
+-- License      : Mozilla Public License (MPL) Version 2
+-- -------------------------------------------------------------------------- --
+
 library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;

trashernet/trashernet_mac.vhd

@@ -1,3 +1,14 @@
+-- -------------------------------------------------------------------------- --
+--               TRASHERNET - A Trashy Ethernet Stack for FPGAs               --
+-- -------------------------------------------------------------------------- --
+-- trashernet_mac.vhd : Ethernet OSI Layer 2, Data Link
+--   Implements packet handling and MAC-Layer en/decoding.
+-- -------------------------------------------------------------------------- --
+-- Author       : Markus Koch <markus@notsyncing.net>
+-- Contributors : None
+-- License      : Mozilla Public License (MPL) Version 2
+-- -------------------------------------------------------------------------- --
+
 library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;

trashernet/trashernet_phy.vhd

@@ -1,3 +1,14 @@
+-- -------------------------------------------------------------------------- --
+--               TRASHERNET - A Trashy Ethernet Stack for FPGAs               --
+-- -------------------------------------------------------------------------- --
+-- trashernet_phy.vhd : Ethernet OSI Layer 1, Physical
+--   Implements low-level bit encoding and timing and frame synchronization.
+-- -------------------------------------------------------------------------- --
+-- Author       : Markus Koch <markus@notsyncing.net>
+-- Contributors : None
+-- License      : Mozilla Public License (MPL) Version 2
+-- -------------------------------------------------------------------------- --
+
 library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;

trashernet/trashernet_phy_cdc.vhd

@@ -1,3 +1,14 @@
+-- -------------------------------------------------------------------------- --
+--               TRASHERNET - A Trashy Ethernet Stack for FPGAs               --
+-- -------------------------------------------------------------------------- --
+-- trashernet_phy_cdc.vhd : Dual clock wrapper for the trashernet_phy
+--   Implements CDC between the PHY and DATA clock domains.
+-- -------------------------------------------------------------------------- --
+-- Author       : Markus Koch <markus@notsyncing.net>
+-- Contributors : None
+-- License      : Mozilla Public License (MPL) Version 2
+-- -------------------------------------------------------------------------- --
+
 library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;

trashernet/trashernet_types.vhd

@@ -1,3 +1,13 @@
+-- -------------------------------------------------------------------------- --
+--               TRASHERNET - A Trashy Ethernet Stack for FPGAs               --
+-- -------------------------------------------------------------------------- --
+-- trashernet_types.vhd : VHDL types used throughout Trashernet
+-- -------------------------------------------------------------------------- --
+-- Author       : Markus Koch <markus@notsyncing.net>
+-- Contributors : None
+-- License      : Mozilla Public License (MPL) Version 2
+-- -------------------------------------------------------------------------- --
+
 library ieee;
 use ieee.std_logic_1164.all;