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1bff61d24a
| Author | SHA1 | Date | |
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| 1bff61d24a | |||
| 743d2465d9 |
@ -1,3 +1,13 @@
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-- -------------------------------------------------------------------------- --
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-- TRASHERNET - A Trashy Ethernet Stack for FPGAs --
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-- -------------------------------------------------------------------------- --
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-- bench_crc.vhd : Stimulus-only test bench for the CRC
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-- -------------------------------------------------------------------------- --
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-- Author : Markus Koch <markus@notsyncing.net>
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-- Contributors : None
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-- License : Mozilla Public License (MPL) Version 2
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-- -------------------------------------------------------------------------- --
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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@ -18,9 +28,9 @@ architecture bench of bench_crc is
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begin
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crc_inst : entity trashernet.crc
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generic map(
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POLYNOMIAL => POLYNOMIAL,
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START => x"FFFFFFFF",
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FINAL_XOR => x"FFFFFFFF",
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POLYNOMIAL => POLYNOMIAL,
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START => x"FFFFFFFF",
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FINAL_XOR => x"FFFFFFFF",
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REVERSE_OUT => true
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)
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port map(
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@ -1,3 +1,13 @@
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-- -------------------------------------------------------------------------- --
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-- TRASHERNET - A Trashy Ethernet Stack for FPGAs --
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-- -------------------------------------------------------------------------- --
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-- bench_pkg.vhd : Types and functions used for the benches
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-- -------------------------------------------------------------------------- --
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-- Author : Markus Koch <markus@notsyncing.net>
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-- Contributors : None
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-- License : Mozilla Public License (MPL) Version 2
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-- -------------------------------------------------------------------------- --
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library ieee;
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use ieee.std_logic_1164.all;
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@ -1,3 +1,14 @@
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-- -------------------------------------------------------------------------- --
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-- TRASHERNET - A Trashy Ethernet Stack for FPGAs --
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-- -------------------------------------------------------------------------- --
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-- bench_trashernet_mac.vhd : Stimulus-only test bench for the MAC+PHY parts
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-- Tests TX path through the RX path. Not great, but whatever.
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-- -------------------------------------------------------------------------- --
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-- Author : Markus Koch <markus@notsyncing.net>
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-- Contributors : None
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-- License : Mozilla Public License (MPL) Version 2
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-- -------------------------------------------------------------------------- --
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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@ -1,3 +1,14 @@
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-- -------------------------------------------------------------------------- --
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-- TRASHERNET - A Trashy Ethernet Stack for FPGAs --
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-- -------------------------------------------------------------------------- --
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-- bench_trashernet_phy.vhd : Stimulus-only test bench for the PHY part
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-- Tests only the RX path.
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-- -------------------------------------------------------------------------- --
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-- Author : Markus Koch <markus@notsyncing.net>
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-- Contributors : None
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-- License : Mozilla Public License (MPL) Version 2
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-- -------------------------------------------------------------------------- --
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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@ -1,3 +1,13 @@
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-- -------------------------------------------------------------------------- --
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-- TRASHERNET - A Trashy Ethernet Stack for FPGAs --
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-- -------------------------------------------------------------------------- --
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-- cdc_strobe.vhd : CDC for strobe-signals
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-- Make sure to leave enough(TM) time between strobes.
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-- -------------------------------------------------------------------------- --
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-- Author : Markus Koch <markus@notsyncing.net>
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-- Contributors : None
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-- License : Mozilla Public License (MPL) Version 2
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-- -------------------------------------------------------------------------- --
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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@ -1,3 +1,13 @@
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-- -------------------------------------------------------------------------- --
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-- TRASHERNET - A Trashy Ethernet Stack for FPGAs --
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-- -------------------------------------------------------------------------- --
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-- crc.vhd : Generic CRC implementation
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-- -------------------------------------------------------------------------- --
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-- Author : Markus Koch <markus@notsyncing.net>
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-- Contributors : None
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-- License : Mozilla Public License (MPL) Version 2
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-- -------------------------------------------------------------------------- --
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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@ -1,3 +1,13 @@
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-- -------------------------------------------------------------------------- --
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-- TRASHERNET - A Trashy Ethernet Stack for FPGAs --
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-- -------------------------------------------------------------------------- --
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-- synchronizer.vhd : Basic shift-register based synchronizer
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-- -------------------------------------------------------------------------- --
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-- Author : Markus Koch <markus@notsyncing.net>
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-- Contributors : None
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-- License : Mozilla Public License (MPL) Version 2
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-- -------------------------------------------------------------------------- --
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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@ -1,3 +1,14 @@
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-- -------------------------------------------------------------------------- --
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-- TRASHERNET - A Trashy Ethernet Stack for FPGAs --
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-- -------------------------------------------------------------------------- --
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-- trashernet_mac.vhd : Ethernet OSI Layer 2, Data Link
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-- Implements packet handling and MAC-Layer en/decoding.
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-- -------------------------------------------------------------------------- --
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-- Author : Markus Koch <markus@notsyncing.net>
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-- Contributors : None
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-- License : Mozilla Public License (MPL) Version 2
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-- -------------------------------------------------------------------------- --
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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@ -1,3 +1,14 @@
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-- -------------------------------------------------------------------------- --
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-- TRASHERNET - A Trashy Ethernet Stack for FPGAs --
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-- -------------------------------------------------------------------------- --
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-- trashernet_phy.vhd : Ethernet OSI Layer 1, Physical
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-- Implements low-level bit encoding and timing and frame synchronization.
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-- -------------------------------------------------------------------------- --
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-- Author : Markus Koch <markus@notsyncing.net>
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-- Contributors : None
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-- License : Mozilla Public License (MPL) Version 2
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-- -------------------------------------------------------------------------- --
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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@ -1,3 +1,14 @@
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-- -------------------------------------------------------------------------- --
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-- TRASHERNET - A Trashy Ethernet Stack for FPGAs --
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-- -------------------------------------------------------------------------- --
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-- trashernet_phy_cdc.vhd : Dual clock wrapper for the trashernet_phy
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-- Implements CDC between the PHY and DATA clock domains.
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-- -------------------------------------------------------------------------- --
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-- Author : Markus Koch <markus@notsyncing.net>
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-- Contributors : None
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-- License : Mozilla Public License (MPL) Version 2
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-- -------------------------------------------------------------------------- --
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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@ -16,11 +27,11 @@ entity trashernet_phy_cdc is
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rst : in std_logic; -- Asynchronous reset
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-- System interface
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rx_data : out byte; -- RX Data
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rx_data : out byte; -- RX Data
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rx_data_valid : out std_logic; -- RX Data valid
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rx_active : out std_logic; -- RX of packet in progress
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tx_data : in byte; -- TX Data
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tx_data : in byte; -- TX Data
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tx_data_en : in std_logic; -- Transmitter enable
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tx_data_ack : out std_logic; -- Latched data_tx
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tx_active : out std_logic; -- Transmission in progress
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@ -1,3 +1,13 @@
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-- -------------------------------------------------------------------------- --
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-- TRASHERNET - A Trashy Ethernet Stack for FPGAs --
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-- -------------------------------------------------------------------------- --
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-- trashernet_types.vhd : VHDL types used throughout Trashernet
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-- -------------------------------------------------------------------------- --
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-- Author : Markus Koch <markus@notsyncing.net>
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-- Contributors : None
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-- License : Mozilla Public License (MPL) Version 2
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-- -------------------------------------------------------------------------- --
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library ieee;
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use ieee.std_logic_1164.all;
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