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fpga
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trashernet
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Code
Issues
7
Pull Requests
2
Releases
2
Wiki
Activity
PHY + MAC
New Issue
A demo design communicates with a PC through a commercial network switch.
2022-01-31
100%
Completed
0 Open
4 Closed
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markus
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PHY:TX: Improve handling of NLP timing generation
enhancement
1
#6
by
markus
was closed
2022-01-29 20:26:53 +01:00
DEMO: Implement MAC-layer test design
feature
3
#5
by
markus
was closed
2022-01-23 16:56:30 +01:00
MAC:TX: Implement padding
bug
#4
by
markus
was closed
2022-01-16 14:45:20 +01:00
PHY: Don't process Manchester timing right from the start
enhancement
1
#2
by
markus
was closed
2022-01-30 18:06:55 +01:00