Markus Koch markus
markus pushed to master at markus/yacos 2019-07-20 23:51:38 +02:00
040d74b8c4 Create code to load GUI
markus pushed to master at markus/yacos 2019-07-20 16:34:41 +02:00
2b57db2787 Design UI
markus pushed to master at markus/yacos 2019-07-20 14:50:07 +02:00
181deb2fdb Create appropriate CMakeLists
markus deleted tag master from markus/yacos 2019-07-20 14:23:02 +02:00
markus pushed to master at markus/yacos 2019-07-20 14:23:02 +02:00
2024871cb5 Initialize project
markus created repository markus/yacos 2019-07-20 14:22:48 +02:00
markus closed issue electronics/ttl-fpga#11 2019-06-29 12:47:25 +02:00
Sync bit wrong polarity
markus pushed to sw at electronics/ttl-fpga 2019-06-29 12:47:25 +02:00
f60d76f831 Fix sync polarity
markus commented on issue electronics/ttl-fpga#13 2019-06-29 12:40:15 +02:00
Drive SEL A/A or B/B not detected as invalid

Fixed in commit 9a06c054e849319918825cdee9f65602d2271512.

markus closed issue electronics/ttl-fpga#13 2019-06-29 12:40:15 +02:00
Drive SEL A/A or B/B not detected as invalid
markus pushed to sw at electronics/ttl-fpga 2019-06-29 12:36:58 +02:00
9a06c054e8 Fix bitstream generator collision check
markus commented on issue electronics/ttl-fpga#12 2019-06-23 10:01:42 +02:00
LUT output-muxing pin-swap

More thoughts on this. If I do this, I can never drive B to net 1 or 3. Essentially not a big deal as we can just swap LUT3-1 and LUT3-2 in SW.

markus opened issue electronics/ttl-fpga#14 2019-06-22 23:09:07 +02:00
Reverse bit order in cell-specific code
markus commented on issue electronics/ttl-fpga#12 2019-06-22 22:58:57 +02:00
LUT output-muxing pin-swap

Actually, that's not quite correct. To get the LUT Output Muxing table as shown besides the MUX, pin 12 (currently B) needs to be removed from the pad and shorted to pin 13 (A) next to it. Luckily, that bodge super easy to perform.

markus pushed to sw at electronics/ttl-fpga 2019-06-22 17:51:07 +02:00
29efb7446b Add spreadsheet to help generate LUT configs
markus pushed to sw at electronics/ttl-fpga 2019-06-22 17:47:45 +02:00
0de1c093cd Add program.sh script
markus pushed to sw at electronics/ttl-fpga 2019-06-22 17:25:14 +02:00
15fe4e4ca3 Add test configuration for 2-bit counter
6846aff71d Add debug print for bitstream bits
01df956317 Fix a variety of bugs found during integration
89e78a3576 Add test configuration for counter
ed31edabd9 Add debug print for bitstream bits
Compare 6 commits »
markus pushed to sw at electronics/ttl-fpga 2019-06-22 17:22:43 +02:00
89e78a3576 Add test configuration for counter
ed31edabd9 Add debug print for bitstream bits
6ef93fef50 Fix a variety of bugs found during integration
Compare 3 commits »
markus opened issue electronics/ttl-fpga#13 2019-06-22 17:19:16 +02:00
Drive SEL A/A or B/B not detected as invalid
markus opened issue electronics/ttl-fpga#12 2019-06-22 16:54:40 +02:00
LUT output-muxing pin-swap