Markus Koch markus
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markus pushed to feature/fpga at electronics/trashernet-soc 2024-11-08 16:02:18 +01:00
b8f273c9b6 fpga: bench: Add bench to run larger programs from external RAM
9487f5c2ef fpga: top: Refactor indentation
f21122c54b fpga: Add script to remove $asserts from netlists
0943656548 fpga: run.py: Increase NVC heap size to simulate full 8 MB of external RAM
4ca35ca18c fpga: aps6404l device model: Print message instead of failing for out of bounds accesses
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markus pushed to feature/fpga at electronics/trashernet-soc 2024-09-27 16:34:48 +02:00
8cf103a18d fpga: neorv32: Disable reset of regfile
cc4b088173 fpga: ram: Use Verilog model for synthesis and VHDL for simulation
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markus pushed to feature/fpga at electronics/trashernet-soc 2024-09-27 14:47:19 +02:00
7497f1f6bb fpga: Add Sigasi / Code project
297d340d6a fpga: bench: Add self-checking test bench for bootrom
ba299e537b fpga: Add NEORV32 as alternative CPU core
bb7b2a7a10 fpga: servant_ram: Rewrite in VHDL
0545769bcd fpga: bench: Fix top level clock pin name
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markus pushed to master at markus/leddie 2024-09-22 11:00:06 +02:00
fff84ff85e fw: app: Fix reset behavior
markus pushed to master at markus/leddie 2024-09-22 10:57:41 +02:00
40ba2ea4dc fw: Add watchdog
markus pushed to master at markus/leddie 2024-09-22 10:52:04 +02:00
d91fe6787c fw: Add watchdog
markus pushed to feature/fpga at electronics/trashernet-soc 2024-08-14 19:12:21 +02:00
3ecc6a4ed1 fpga: aps6404l_wb: Fix memory arbitration bug
markus pushed to feature/fpga at electronics/trashernet-soc 2024-08-09 13:59:49 +02:00
838a8abe7b tools: Update flasher script to new bus layout
e7d9f391ef fpga: Clean up clocking code
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markus pushed to feature/fpga at electronics/trashernet-soc 2024-08-09 13:40:23 +02:00
f9335f202e fpga: Clean up clocking code
markus pushed to feature/fpga at electronics/trashernet-soc 2024-08-09 11:28:50 +02:00
b06ccdda2a fpga: Update UART baud rate to 250 kbaud/s
876693ca5f fpga: uart_wb: Latch received byte to allow late retrieval of data
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markus pushed to feature/fpga at electronics/trashernet-soc 2024-08-07 17:58:21 +02:00
e561c31691 sw: bootrom: Improve performance and reduce size
markus pushed to feature/fpga at electronics/trashernet-soc 2024-08-01 21:09:12 +02:00
49ccbea9e9 fpga: aps6404l device model: Remove unnecessary newlines
markus pushed to feature/fpga at electronics/trashernet-soc 2024-08-01 21:08:23 +02:00
eddbcf5f6f fpga: trashernet_phy_wb: Ensure LEDs blink even with constant traffic
74280fb79a fpga: Implement single-instruction prefetching from external RAM
280b354813 fpga: aps6404l_controller: Add generic to select wrap mode
7bece90229 fpga: Cleanly separate build VUnit from bench VUnit
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markus pushed to feature/fpga at electronics/trashernet-soc 2024-07-26 10:53:31 +02:00
db5a14a2f0 fpga: Add generic FIFO core
markus pushed to feature/fpga at electronics/trashernet-soc 2024-07-23 19:11:57 +02:00
e81166a82c fpga: Implement functional Ethernet controller
markus pushed to feature/fpga at electronics/trashernet-soc 2024-07-23 19:08:58 +02:00
f0f9a1953b fpga: Implement functional Ethernet controller
79b1153df7 env: Makefile: Add support for icetime
0209a23980 fpga: Fix clock constraint for system clock
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markus pushed to feature/trashernet-soc at fpga/trashernet 2024-07-23 19:00:19 +02:00
206332f3d1 raw_mac: Implement MAC without header field en-/decoding (only CRC + framing)
markus pushed to master at fpga/trashernet 2024-07-15 13:36:50 +02:00
7379df7b74 phy: Improve clock accuracy at 0.5 dividers at the cost of some jitter
markus created branch feature/trashernet-soc in fpga/trashernet 2024-07-15 13:36:42 +02:00
markus pushed to feature/trashernet-soc at fpga/trashernet 2024-07-15 13:36:42 +02:00
f57b0b1054 raw_mac: Implement MAC without header field en-/decoding (only CRC + framing)
7379df7b74 phy: Improve clock accuracy at 0.5 dividers at the cost of some jitter
Compare 2 commits »