Merge branch 'master' of git.notsyncing.net:electronics/tiny-xo2

This commit is contained in:
Markus Koch 2017-11-25 13:31:47 +01:00
commit 479d1b17b9
8 changed files with 1129 additions and 563 deletions

1
.gitignore vendored
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@ -1,5 +1,4 @@
*.bak *.bak
*-cache.lib
*.kicad_pcb-bak *.kicad_pcb-bak
*.net *.net
*.out *.out

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@ -195,7 +195,7 @@ Header \texttt{J4} has special functions assigned to most of its pins. Refer to
\multirow{4}{3em}{\acs{jtag}} & \texttt{29} & TMS & \multirow{4}{8em}{See chapter \ref{progopt:always}} \\ \multirow{4}{3em}{\acs{jtag}} & \texttt{29} & TMS & \multirow{4}{8em}{See chapter \ref{progopt:always}} \\
& \texttt{30} & TCK \\ & \texttt{30} & TCK \\
& \texttt{31} & TDI \\ & \texttt{32} & TDI \\
& \texttt{01} & TDO \\ \midrule & \texttt{01} & TDO \\ \midrule
\multirow{3}{3em}{\acs{uart}} & \texttt{20} & \acs{rx} & \multirow{3}{8em}{See chapter \ref{uart}} \\ \multirow{3}{3em}{\acs{uart}} & \texttt{20} & \acs{rx} & \multirow{3}{8em}{See chapter \ref{uart}} \\
@ -303,6 +303,7 @@ All \ac{io} pins are available as user \acp{io}.
\begin{tabular}{ll} \toprule \begin{tabular}{ll} \toprule
\textbf{Version} & \textbf{Comment} \\ \midrule \textbf{Version} & \textbf{Comment} \\ \midrule
2017-11-25 & DTR usage, 2.5 V mod \\ 2017-11-25 & DTR usage, 2.5 V mod \\
2017-11-20 & Fix \ac{jtag} TDI pin number \\
2017-11-16 & Editorial changes \\ 2017-11-16 & Editorial changes \\
2017-11-10 & Initial draft \\ \bottomrule 2017-11-10 & Initial draft \\ \bottomrule
\end{tabular} \end{tabular}

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@ -39,7 +39,7 @@ encoding utf-8
Sheet 4 4 Sheet 4 4
Title "Tiny-XO2" Title "Tiny-XO2"
Date "2017-09-30" Date "2017-09-30"
Rev "01" Rev "02"
Comp "Markus Koch - notsyncing.net" Comp "Markus Koch - notsyncing.net"
Comment1 "Licensed under CC BY-SA 3.0" Comment1 "Licensed under CC BY-SA 3.0"
Comment2 "https://l.notsyncing.net/tinyxo2" Comment2 "https://l.notsyncing.net/tinyxo2"

151
power.sch
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@ -39,7 +39,7 @@ encoding utf-8
Sheet 2 4 Sheet 2 4
Title "Tiny-XO2" Title "Tiny-XO2"
Date "2017-09-30" Date "2017-09-30"
Rev "01" Rev "02"
Comp "Markus Koch - notsyncing.net" Comp "Markus Koch - notsyncing.net"
Comment1 "Licensed under CC BY-SA 3.0" Comment1 "Licensed under CC BY-SA 3.0"
Comment2 "https://l.notsyncing.net/tinyxo2" Comment2 "https://l.notsyncing.net/tinyxo2"
@ -49,78 +49,78 @@ $EndDescr
$Comp $Comp
L AP1117-33 U1 L AP1117-33 U1
U 1 1 59CE0B45 U 1 1 59CE0B45
P 1750 1200 P 1750 1150
F 0 "U1" H 1750 1442 50 0000 C CNN F 0 "U1" H 1750 1392 50 0000 C CNN
F 1 "AP1117-33" H 1750 1351 50 0000 C CNN F 1 "AP1117-33" H 1750 1301 50 0000 C CNN
F 2 "TO_SOT_Packages_SMD:SOT-223-3Lead_TabPin2" H 1750 1400 50 0001 C CNN F 2 "TO_SOT_Packages_SMD:SOT-223-3Lead_TabPin2" H 1750 1350 50 0001 C CNN
F 3 "" H 1850 950 50 0001 C CNN F 3 "" H 1850 900 50 0001 C CNN
1 1750 1200 1 1750 1150
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L C_Small C6 L C_Small C6
U 1 1 59CE0D8D U 1 1 59CE0D8D
P 1300 1400 P 1300 1350
F 0 "C6" H 1392 1446 50 0000 L CNN F 0 "C6" H 1392 1396 50 0000 L CNN
F 1 "100n" H 1392 1355 50 0000 L CNN F 1 "100n" H 1392 1305 50 0000 L CNN
F 2 "Capacitors_SMD:C_0603" H 1300 1400 50 0001 C CNN F 2 "Capacitors_SMD:C_0603" H 1300 1350 50 0001 C CNN
F 3 "" H 1300 1400 50 0001 C CNN F 3 "" H 1300 1350 50 0001 C CNN
1 1300 1400 1 1300 1350
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L CP_Small C5 L CP_Small C5
U 1 1 59CE0E72 U 1 1 59CE0E72
P 1100 1400 P 1100 1350
F 0 "C5" H 1187 1446 50 0000 L CNN F 0 "C5" H 1187 1396 50 0000 L CNN
F 1 "1u" H 1187 1355 50 0000 L CNN F 1 "10u" H 1187 1305 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805" H 1100 1400 50 0001 C CNN F 2 "Capacitors_SMD:C_0805" H 1100 1350 50 0001 C CNN
F 3 "" H 1100 1400 50 0001 C CNN F 3 "" H 1100 1350 50 0001 C CNN
1 1100 1400 1 1100 1350
-1 0 0 -1 -1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L C_Small C7 L C_Small C7
U 1 1 59CE1081 U 1 1 59CE1081
P 2200 1400 P 2200 1350
F 0 "C7" H 2108 1354 50 0000 R CNN F 0 "C7" H 2108 1304 50 0000 R CNN
F 1 "100n" H 2108 1445 50 0000 R CNN F 1 "100n" H 2108 1395 50 0000 R CNN
F 2 "Capacitors_SMD:C_0603" H 2200 1400 50 0001 C CNN F 2 "Capacitors_SMD:C_0603" H 2200 1350 50 0001 C CNN
F 3 "" H 2200 1400 50 0001 C CNN F 3 "" H 2200 1350 50 0001 C CNN
1 2200 1400 1 2200 1350
1 0 0 1 1 0 0 1
$EndComp $EndComp
$Comp $Comp
L GND #PWR05 L GND #PWR05
U 1 1 59CE11F3 U 1 1 59CE11F3
P 1750 1700 P 1750 1650
F 0 "#PWR05" H 1750 1450 50 0001 C CNN F 0 "#PWR05" H 1750 1400 50 0001 C CNN
F 1 "GND" H 1755 1527 50 0000 C CNN F 1 "GND" H 1755 1477 50 0000 C CNN
F 2 "" H 1750 1700 50 0001 C CNN F 2 "" H 1750 1650 50 0001 C CNN
F 3 "" H 1750 1700 50 0001 C CNN F 3 "" H 1750 1650 50 0001 C CNN
1 1750 1700 1 1750 1650
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3V3 #PWR02 L +3V3 #PWR02
U 1 1 59CE142B U 1 1 59CE142B
P 2200 1100 P 2400 1050
F 0 "#PWR02" H 2200 950 50 0001 C CNN F 0 "#PWR02" H 2400 900 50 0001 C CNN
F 1 "+3V3" H 2215 1273 50 0000 C CNN F 1 "+3V3" H 2415 1223 50 0000 C CNN
F 2 "" H 2200 1100 50 0001 C CNN F 2 "" H 2400 1050 50 0001 C CNN
F 3 "" H 2200 1100 50 0001 C CNN F 3 "" H 2400 1050 50 0001 C CNN
1 2200 1100 1 2400 1050
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L VBUS #PWR03 L VBUS #PWR03
U 1 1 59CE157B U 1 1 59CE157B
P 1200 1150 P 1200 1100
F 0 "#PWR03" H 1200 1000 50 0001 C CNN F 0 "#PWR03" H 1200 950 50 0001 C CNN
F 1 "VBUS" H 1215 1323 50 0000 C CNN F 1 "VBUS" H 1215 1273 50 0000 C CNN
F 2 "" H 1200 1150 50 0001 C CNN F 2 "" H 1200 1100 50 0001 C CNN
F 3 "" H 1200 1150 50 0001 C CNN F 3 "" H 1200 1100 50 0001 C CNN
1 1200 1150 1 1200 1100
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
@ -201,30 +201,28 @@ F 3 "" H 4500 1350 50 0001 C CNN
1 0 0 1 1 0 0 1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
1100 1300 1300 1300 1100 1250 1300 1250
Wire Wire Line Wire Wire Line
1100 1500 1300 1500 1100 1450 1300 1450
Wire Wire Line Wire Wire Line
1200 1150 1200 1300 1200 1100 1200 1250
Connection ~ 1200 1300 Connection ~ 1200 1250
Wire Wire Line Wire Wire Line
1200 1500 1200 1600 1200 1450 1200 1550
Wire Wire Line Wire Wire Line
1200 1600 2200 1600 1200 1550 2600 1550
Wire Wire Line Wire Wire Line
1750 1500 1750 1700 1750 1450 1750 1650
Connection ~ 1200 1500 Connection ~ 1200 1450
Wire Wire Line Wire Wire Line
2200 1100 2200 1300 2050 1150 2600 1150
Wire Wire Line Wire Wire Line
2200 1200 2050 1200 2200 1550 2200 1450
Connection ~ 1750 1550
Connection ~ 2200 1150
Wire Wire Line Wire Wire Line
2200 1600 2200 1500 1200 1150 1450 1150
Connection ~ 1750 1600 Connection ~ 1200 1150
Connection ~ 2200 1200
Wire Wire Line
1200 1200 1450 1200
Connection ~ 1200 1200
Wire Wire Line Wire Wire Line
3400 2750 3500 2750 3400 2750 3500 2750
Wire Wire Line Wire Wire Line
@ -356,4 +354,39 @@ Wire Wire Line
1750 3250 1750 3350 1750 3250 1750 3350
Wire Wire Line Wire Wire Line
1750 2550 1750 2450 1750 2550 1750 2450
$Comp
L CP_Small C16
U 1 1 5A18788A
P 2400 1350
F 0 "C16" H 2200 1400 50 0000 L CNN
F 1 "10u" H 2200 1300 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805" H 2400 1350 50 0001 C CNN
F 3 "" H 2400 1350 50 0001 C CNN
1 2400 1350
-1 0 0 -1
$EndComp
Wire Wire Line
2400 1550 2400 1450
Connection ~ 2200 1550
$Comp
L CP_Small C17
U 1 1 5A1896B7
P 2600 1350
F 0 "C17" H 2400 1400 50 0000 L CNN
F 1 "10u" H 2400 1300 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805" H 2600 1350 50 0001 C CNN
F 3 "" H 2600 1350 50 0001 C CNN
1 2600 1350
-1 0 0 -1
$EndComp
Wire Wire Line
2600 1150 2600 1250
Connection ~ 2400 1150
Wire Wire Line
2600 1550 2600 1450
Connection ~ 2400 1550
Wire Wire Line
2200 1250 2200 1150
Wire Wire Line
2400 1050 2400 1250
$EndSCHEMATC $EndSCHEMATC

428
tiny-xo2-cache.lib Normal file
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@ -0,0 +1,428 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# +3V3
#
DEF +3V3 #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "+3V3" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS +3.3V
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# AP1117-15
#
DEF AP1117-15 U 0 10 Y Y 1 F N
F0 "U" -150 125 50 H V C CNN
F1 "AP1117-15" 0 125 50 H V L CNN
F2 "TO_SOT_Packages_SMD:SOT-223-3Lead_TabPin2" 0 200 50 H I C CNN
F3 "" 100 -250 50 H I C CNN
ALIAS AP1117-18 AP1117-25 AP1117-33 AP1117-50 LD1117S33TR_SOT223 LD1117S12TR_SOT223 LD1117S18TR_SOT223 LD1117S25TR_SOT223 LD1117S50TR_SOT223 NCP1117-12_SOT223 NCP1117-1.5_SOT223 NCP1117-1.8_SOT223 NCP1117-2.0_SOT223 NCP1117-2.5_SOT223 NCP1117-2.85_SOT223 NCP1117-3.3_SOT223 NCP1117-5.0_SOT223
$FPLIST
SOT?223*TabPin2*
$ENDFPLIST
DRAW
S -200 -200 200 75 0 1 10 f
X GND 1 0 -300 100 U 50 50 1 1 W
X VO 2 300 0 100 L 50 50 1 1 P
X VI 3 -300 0 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
# C
#
DEF C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CP_Small
#
DEF CP_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "CP_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
CP_*
$ENDFPLIST
DRAW
S -60 -12 60 -27 0 1 0 F
S -60 27 60 12 0 1 0 N
P 2 0 1 0 -50 60 -30 60 N
P 2 0 1 0 -40 50 -40 70 N
X ~ 1 0 100 73 D 50 50 1 1 P
X ~ 2 0 -100 73 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# C_Small
#
DEF C_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "C_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 13 -60 -20 60 -20 N
P 2 0 1 12 -60 20 60 20 N
X ~ 1 0 100 80 D 50 50 1 1 P
X ~ 2 0 -100 80 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Conn_01x15
#
DEF Conn_01x15 J 0 40 Y N 1 F N
F0 "J" 0 800 50 H V C CNN
F1 "Conn_01x15" 0 -800 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_??x*mm*
Connector*:*1x??x*mm*
Pin?Header?Straight?1X*
Pin?Header?Angled?1X*
Socket?Strip?Straight?1X*
Socket?Strip?Angled?1X*
$ENDFPLIST
DRAW
S -50 -695 0 -705 1 1 6 N
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 605 0 595 1 1 6 N
S -50 705 0 695 1 1 6 N
S -50 750 50 -750 1 1 10 f
X Pin_1 1 -200 700 150 R 50 50 1 1 P
X Pin_10 10 -200 -200 150 R 50 50 1 1 P
X Pin_11 11 -200 -300 150 R 50 50 1 1 P
X Pin_12 12 -200 -400 150 R 50 50 1 1 P
X Pin_13 13 -200 -500 150 R 50 50 1 1 P
X Pin_14 14 -200 -600 150 R 50 50 1 1 P
X Pin_15 15 -200 -700 150 R 50 50 1 1 P
X Pin_2 2 -200 600 150 R 50 50 1 1 P
X Pin_3 3 -200 500 150 R 50 50 1 1 P
X Pin_4 4 -200 400 150 R 50 50 1 1 P
X Pin_5 5 -200 300 150 R 50 50 1 1 P
X Pin_6 6 -200 200 150 R 50 50 1 1 P
X Pin_7 7 -200 100 150 R 50 50 1 1 P
X Pin_8 8 -200 0 150 R 50 50 1 1 P
X Pin_9 9 -200 -100 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Conn_02x04_Odd_Even
#
DEF Conn_02x04_Odd_Even J 0 40 Y N 1 F N
F0 "J" 50 200 50 H V C CNN
F1 "Conn_02x04_Odd_Even" 50 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*2x??x*mm*
Connector*:*2x???Pitch*
Pin_Header_Straight_2X*
Pin_Header_Angled_2X*
Socket_Strip_Straight_2X*
Socket_Strip_Angled_2X*
$ENDFPLIST
DRAW
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 150 150 -250 1 1 10 f
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
X Pin_1 1 -200 100 150 R 50 50 1 1 P
X Pin_2 2 300 100 150 L 50 50 1 1 P
X Pin_3 3 -200 0 150 R 50 50 1 1 P
X Pin_4 4 300 0 150 L 50 50 1 1 P
X Pin_5 5 -200 -100 150 R 50 50 1 1 P
X Pin_6 6 300 -100 150 L 50 50 1 1 P
X Pin_7 7 -200 -200 150 R 50 50 1 1 P
X Pin_8 8 300 -200 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# D_ALT
#
DEF D_ALT D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "D_ALT" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
TO-???*
*SingleDiode
*_Diode_*
*SingleDiode*
D_*
$ENDFPLIST
DRAW
P 2 0 1 8 -50 50 -50 -50 N
P 2 0 1 0 50 0 -50 0 N
P 4 0 1 8 50 50 50 -50 -50 0 50 50 F
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# LCMXO2-1200HC-4SG32C
#
DEF LCMXO2-1200HC-4SG32C U 0 40 Y Y 5 L N
F0 "U" 400 50 60 H V C CNN
F1 "LCMXO2-1200HC-4SG32C" 400 150 60 H V C CNN
F2 "" 250 -700 60 H I C CNN
F3 "" 250 -700 60 H I C CNN
ALIAS LCMXO2-1200HC-5SG32C LCMXO2-1200HC-6SG32C
$FPLIST
QFN32
QFN-32
$ENDFPLIST
DRAW
T 0 400 -50 60 0 1 1 FPGA~Power Normal 0 C C
T 0 400 -50 60 0 2 1 Bank~0 Normal 0 C C
T 0 400 -50 60 0 3 1 Bank~1 Normal 0 C C
T 0 400 -50 60 0 4 1 Bank~2 Normal 0 C C
T 0 400 -50 60 0 5 1 Bank~3 Normal 0 C C
S 0 -100 800 -550 1 1 0 f
S 0 0 800 -100 1 1 0 f
S 0 -100 800 -1350 2 1 0 f
S 800 0 0 -100 2 1 0 f
S 0 -100 800 -550 3 1 0 f
S 0 0 800 -100 3 1 0 f
S 0 -100 800 -1350 4 1 0 f
S 0 0 800 -100 4 1 0 f
S 0 -100 800 -550 5 1 0 f
S 0 0 800 -100 5 1 0 f
X VCC 18 -200 -300 200 R 50 50 1 1 W
X VCC 2 -200 -200 200 R 50 50 1 1 W
X GND 22 1000 -300 200 L 50 50 1 1 W
X GND 3 1000 -200 200 L 50 50 1 1 W
X PAD 33 -200 -450 200 R 50 50 1 1 U
X PT10C_TDO 1 -200 -1000 200 R 50 50 2 1 B
X PT17D_DONE 23 -200 -300 200 R 50 50 2 1 B
X VCCIO0 24 -200 -1150 200 R 50 50 2 1 W
X PT15D_PROGRAMN 25 -200 -200 200 R 50 50 2 1 B I
X PT15C_JTAGENB 26 -200 -400 200 R 50 50 2 1 B
X PT12D_SDAPCLKC0 27 -200 -500 200 R 50 50 2 1 B
X PT12C_SCLPCLKT0 28 -200 -600 200 R 50 50 2 1 B
X PT11D_TMS 29 -200 -700 200 R 50 50 2 1 B
X PT11C_TCK 30 -200 -800 200 R 50 50 2 1 B
X VCCIO0 31 -200 -1250 200 R 50 50 2 1 W
X PT10D_TDI 32 -200 -900 200 R 50 50 2 1 B
X VCCIO1 19 -200 -450 200 R 50 50 3 1 W
X PR5D_PCLKC1 20 -200 -200 200 R 50 50 3 1 B
X PR5C_PCLKT1 21 -200 -300 200 R 50 50 3 1 B
X PB6D_SOSPISO 10 -200 -400 200 R 50 50 4 1 B
X PB9A_PCLKT20 11 -200 -500 200 R 50 50 4 1 B
X PB9B_PCLKC20 12 -200 -600 200 R 50 50 4 1 B
X PB11A_PCLKT21 13 -200 -700 200 R 50 50 4 1 B
X PB11B_PCLKC21 14 -200 -800 200 R 50 50 4 1 B
X VCCIO2 15 -200 -1150 200 R 50 50 4 1 W
X PB20C_SN 16 -200 -900 200 R 50 50 4 1 B
X PB20D_SISPI 17 -200 -1000 200 R 50 50 4 1 B
X VCCIO2 7 -200 -1250 200 R 50 50 4 1 W
X PB4C_CSSPIN 8 -200 -200 200 R 50 50 4 1 B
X PB6C_MCLKCCLK 9 -200 -300 200 R 50 50 4 1 B
X PL9A_PCLKT3 4 -200 -200 200 R 50 50 5 1 B
X PL9B_PCLKC3 5 -200 -300 200 R 50 50 5 1 B
X VCCIO3 6 -200 -450 200 R 50 50 5 1 W
ENDDRAW
ENDDEF
#
# LED_ALT
#
DEF LED_ALT D 0 40 Y N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "LED_ALT" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
LED*
$ENDFPLIST
DRAW
P 2 0 1 8 -50 -50 -50 50 N
P 2 0 1 0 -50 0 50 0 N
P 4 0 1 8 50 -50 50 50 -50 0 50 -50 F
P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# OSC
#
DEF OSC U 0 40 Y Y 1 F N
F0 "U" 200 -100 60 H V C CNN
F1 "OSC" 600 -100 60 H V C CNN
F2 "" 200 -150 60 H V C CNN
F3 "" 200 -150 60 H V C CNN
DRAW
S 0 0 800 700 1 1 0 N
S 200 360 250 340 1 1 0 N
P 2 1 1 0 190 370 260 370 N
P 2 1 1 0 225 250 225 330 N
P 2 1 1 0 225 450 225 370 N
P 2 1 1 0 260 330 190 330 N
P 2 1 1 0 300 250 225 250 N
P 2 1 1 0 300 450 225 450 N
P 2 1 1 0 575 350 550 350 N
P 3 1 1 0 570 550 440 550 440 420 N
P 4 1 1 0 300 500 300 200 550 350 300 500 N
X CON 1 1100 550 300 L 60 60 1 1 I
X VSS 2 -300 150 300 R 60 60 1 1 W
X OUT 3 1100 350 300 L 60 60 1 1 O
X VDD 4 -300 550 300 R 60 60 1 1 W
ENDDRAW
ENDDEF
#
# R
#
DEF R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# USB_OTG
#
DEF USB_OTG J 0 40 Y Y 1 F N
F0 "J" -200 450 50 H V L CNN
F1 "USB_OTG" -200 350 50 H V L CNN
F2 "" 150 -50 50 H I C CNN
F3 "" 150 -50 50 H I C CNN
$FPLIST
USB*
$ENDFPLIST
DRAW
C -150 85 25 0 1 10 F
C -25 135 15 0 1 10 F
S -200 -300 200 300 0 1 10 f
S -5 -300 5 -270 0 1 0 N
S 10 50 -20 20 0 1 10 F
S 200 -205 170 -195 0 1 0 N
S 200 -105 170 -95 0 1 0 N
S 200 -5 170 5 0 1 0 N
S 200 195 170 205 0 1 0 N
P 2 0 1 10 -75 85 25 85 N
P 4 0 1 10 -125 85 -100 85 -50 135 -25 135 N
P 4 0 1 10 -100 85 -75 85 -50 35 0 35 N
P 4 0 1 10 25 110 25 60 75 85 25 110 F
P 5 0 1 0 -170 220 -70 220 -80 190 -160 190 -170 220 F
P 9 0 1 0 -185 230 -185 220 -175 190 -175 180 -65 180 -65 190 -55 220 -55 230 -185 230 N
X VBUS 1 300 200 100 L 50 50 1 1 W
X D- 2 300 -100 100 L 50 50 1 1 P
X D+ 3 300 0 100 L 50 50 1 1 P
X ID 4 300 -200 100 L 50 50 1 1 P
X GND 5 0 -400 100 U 50 50 1 1 W
X Shield 6 -100 -400 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# VBUS
#
DEF VBUS #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VBUS" 0 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X VBUS 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# ch340g
#
DEF ch340g U 0 40 Y Y 1 F N
F0 "U" -250 -600 60 H V C CNN
F1 "ch340g" 0 600 60 H V C CNN
F2 "" -300 450 60 H I C CNN
F3 "" -300 450 60 H I C CNN
$FPLIST
SOIC-16_3.9x9.9mm_Pitch1.27mm
SOIC-16
$ENDFPLIST
DRAW
S -300 550 300 -550 0 1 0 f
X GND 1 -500 -450 200 R 50 50 1 1 W
X DSR 10 500 100 200 L 50 50 1 1 O I
X RI 11 500 0 200 L 50 50 1 1 O I
X DCD 12 500 -100 200 L 50 50 1 1 O I
X DTR 13 500 -200 200 L 50 50 1 1 O I
X RTS 14 500 -300 200 L 50 50 1 1 O I
X R232 15 500 -450 200 L 50 50 1 1 I
X VCC 16 -500 -350 200 R 50 50 1 1 W
X TXD 2 500 450 200 L 50 50 1 1 O
X RXD 3 500 350 200 L 50 50 1 1 I
X V3 4 -500 -250 200 R 50 50 1 1 W
X D+ 5 -500 450 200 R 50 50 1 1 B
X D- 6 -500 350 200 R 50 50 1 1 B
X XI 7 -500 100 200 R 50 50 1 1 I C
X XO 8 -500 0 200 R 50 50 1 1 O IC
X CTS 9 500 200 200 L 50 50 1 1 O I
ENDDRAW
ENDDEF
#
#End Library

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@ -39,7 +39,7 @@ encoding utf-8
Sheet 1 4 Sheet 1 4
Title "Tiny-XO2" Title "Tiny-XO2"
Date "2017-09-30" Date "2017-09-30"
Rev "01" Rev "02"
Comp "Markus Koch - notsyncing.net" Comp "Markus Koch - notsyncing.net"
Comment1 "Licensed under CC BY-SA 3.0" Comment1 "Licensed under CC BY-SA 3.0"
Comment2 "https://l.notsyncing.net/tinyxo2" Comment2 "https://l.notsyncing.net/tinyxo2"

View File

@ -39,7 +39,7 @@ encoding utf-8
Sheet 3 4 Sheet 3 4
Title "Tiny-XO2" Title "Tiny-XO2"
Date "2017-09-30" Date "2017-09-30"
Rev "01" Rev "02"
Comp "Markus Koch - notsyncing.net" Comp "Markus Koch - notsyncing.net"
Comment1 "Licensed under CC BY-SA 3.0" Comment1 "Licensed under CC BY-SA 3.0"
Comment2 "https://l.notsyncing.net/tinyxo2" Comment2 "https://l.notsyncing.net/tinyxo2"