Markus Koch 876693ca5f fpga: uart_wb: Latch received byte to allow late retrieval of data ... Else, the CPU would get the part old / half current byte. This enables boot loader baud rates in excess of 19200 baud.		2024-08-09 11:29:33 +02:00
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hdl	fpga: uart_wb: Latch received byte to allow late retrieval of data	2024-08-09 11:29:33 +02:00
.gitignore	fpga: Cleanly separate build VUnit from bench VUnit	2024-08-01 21:02:32 +02:00
constraints.pcf	fpga: Implement functional Ethernet controller	2024-07-23 19:13:42 +02:00
Makefile	fpga: Cleanly separate build VUnit from bench VUnit	2024-08-01 21:02:32 +02:00
run_physical.py	fpga: Cleanly separate build VUnit from bench VUnit	2024-08-01 21:02:32 +02:00
run.py	fpga: Cleanly separate build VUnit from bench VUnit	2024-08-01 21:02:32 +02:00