electronics/ttl-fpga
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Author SHA1 Message Date
Markus Koch
d630a3ee84 Redesign routing and input muxing 2019-05-31 16:36:08 +02:00
Markus Koch
1f3df7f87c Add bypass caps and clean up a bit 2019-05-30 21:36:22 +02:00
Markus Koch
bf55a828a8 Fix LUT split enable logic 2019-05-30 21:12:52 +02:00
Markus Koch
9be0ea5ed4 Design first draft of core logic 2019-05-30 20:24:33 +02:00