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flashrom: Cleanup

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This commit is contained in:
Markus Koch 2016-12-04 18:27:58 +01:00
parent 5ad7677b3a
commit 9ff7421242
2 changed files with 44 additions and 34 deletions
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12
bench/bench_flashrom_controller.vhd
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@ -118,15 +118,21 @@ begin
-- bench code here -- bench code here
wait until ready = '1'; wait until ready = '1';
strobe(load_stb); strobe(load_stb);
wait until ready = '1'; wait until ready = '1';
strobe(load_stb); strobe(load_stb);
wait until ready = '1'; wait until ready = '1';
strobe(status_update_stb); strobe(status_update_stb);
wait until ready = '1'; wait until ready = '1';
strobe(status_update_stb); strobe(status_update_stb);
wait until ready = '1';
strobe(status_update_stb);
wait until ready = '1';
strobe(load_stb);
wait; wait;
end process bench; end process bench;

66
cores/flashrom-wb/flashrom_controller.vhd
View File

@ -82,11 +82,13 @@ begin
flashrom_controller_p : process(clk, rst) is flashrom_controller_p : process(clk, rst) is
variable temp_cnt : integer range 0 to bootup_delay; variable temp_cnt : integer range 0 to bootup_delay;
variable done : boolean;
procedure default_state is procedure default_state is
begin begin
spi_reset_n <= '1'; spi_reset_n <= '1';
spif_data_in_valid <= '0'; spif_data_in_valid <= '0';
done := false;
end procedure default_state; end procedure default_state;
procedure reset_state is procedure reset_state is
@ -103,6 +105,29 @@ begin
temp_cnt := 0; temp_cnt := 0;
end procedure reset_state; end procedure reset_state;
procedure run_command_single(constant data_in_length : integer; constant data_out_length : integer; constant data_out_dummy_bits : integer; constant nTxWords : integer; constant data_in : std_logic_vector(31 downto 0)) is
begin
spif_data_in_length <= data_in_length;
spif_data_out_length <= data_out_length;
spif_data_out_dummy_bits <= data_out_dummy_bits;
spif_data_in_valid <= '1';
spif_data_in <= data_in;
if temp_cnt = nTxWords then
spif_data_in_valid <= '0';
elsif spif_data_next = '1' then
temp_cnt := temp_cnt + 1;
end if;
if spif_data_out_valid = '1' then
spif_data_in_valid <= '0';
done := true;
state <= IDLE;
temp_cnt := 0;
end if;
end procedure run_command_single;
begin begin
if rst = '1' then if rst = '1' then
reset_state; reset_state;
@ -120,48 +145,27 @@ begin
else else
temp_cnt := temp_cnt + 1; temp_cnt := temp_cnt + 1;
end if; end if;
when GETINFO => when GETINFO => -- TODO: In simulation I can only call this command once?!
spif_data_in_length <= 8; -- Other bits after OpCode are don't care, so just repeat OPC run_command_single(8, 32, 8, 5, FLASHROM_COMMAND_MANUFACTURER_ID & padBits(spif_data_in, FLASHROM_COMMAND_MANUFACTURER_ID));
spif_data_out_length <= 32; if done then
spif_data_out_dummy_bits <= 8; info <= spif_data_out;
spif_data_in_valid <= '1';
spif_data_in <= FLASHROM_COMMAND_MANUFACTURER_ID & padBits(spif_data_in, FLASHROM_COMMAND_MANUFACTURER_ID);
if spif_data_out_valid = '1' then
info <= spif_data_out;
state <= IDLE;
end if;
if temp_cnt = 5 then
spif_data_in_valid <= '0';
elsif spif_data_next = '1' then
temp_cnt := temp_cnt + 1;
end if; end if;
when IDLE => when IDLE =>
temp_cnt := 0; temp_cnt := 0;
if status_update_stb = '1' then if status_update_stb = '1' then
state <= GETSTATUS; state <= GETSTATUS;
end if; end if;
if load_stb = '1' then --debug only if load_stb = '1' then --debug only
state <= GETINFO; state <= GETINFO;
end if;
when GETSTATUS =>
spif_data_in_length <= 8; -- Other bits after OpCode are don't care, so just repeat OPC
spif_data_out_length <= 8;
spif_data_out_dummy_bits <= 16;
spif_data_in_valid <= '1';
spif_data_in <= FLASHROM_COMMAND_GET_STATUS & padBits(spif_data_in, FLASHROM_COMMAND_GET_STATUS);
if spif_data_out_valid = '1' then
status <= spif_data_out(7 downto 0);
state <= IDLE;
end if; end if;
if temp_cnt = 3 then when GETSTATUS =>
spif_data_in_valid <= '0'; run_command_single(8, 8, 16, 3, FLASHROM_COMMAND_GET_STATUS & padBits(spif_data_in, FLASHROM_COMMAND_GET_STATUS));
elsif spif_data_next = '1' then if done then
temp_cnt := temp_cnt + 1; status <= spif_data_out(7 downto 0);
end if; end if;
end case; end case;
end if; end if;
end if; end if;
end process flashrom_controller_p; end process flashrom_controller_p;
ready <= '1' when state = IDLE else '0'; ready <= '1' when state = IDLE else '0';
end architecture RTL; end architecture RTL;