phy: tx: Implement tx_active flag

trashernet/trashernet_phy.vhd

@@ -22,6 +22,7 @@ entity trashernet_phy is
 		tx_data        : in  byte;      -- TX Data
 		tx_data_en     : in  std_logic; -- Transmitter enable
 		tx_data_ack    : out std_logic; -- Latched data_tx
+		tx_active      : out std_logic; -- Transmission in progress
 
 		carrier_detect : out std_logic; -- Carrier detected
 		rx_error       : out std_logic; -- Receive error
@@ -374,6 +375,7 @@ begin
 				end case;
 			end if;
 		end process tx_main;
+		tx_active <= '1' when tx_state /= IDLE else '0';
 
 		driver : process(clk, rst) is
 		begin

trashernet/trashernet_phy_cdc.vhd

@@ -23,6 +23,7 @@ entity trashernet_phy_cdc is
 		tx_data        : in  byte; -- TX Data
 		tx_data_en     : in  std_logic; -- Transmitter enable
 		tx_data_ack    : out std_logic; -- Latched data_tx
+		tx_active      : out std_logic; -- Transmission in progress
 
 		carrier_detect : out std_logic; -- Carrier detected
 		rx_error       : out std_logic; -- Receive error
@@ -44,6 +45,7 @@ architecture RTL of trashernet_phy_cdc is
 	signal phy_tx_data_ack    : std_logic;
 	signal phy_carrier_detect : std_logic;
 	signal phy_rx_error       : std_logic;
+	signal phy_tx_active      : std_logic;
 
 	-- Helper signals
 	signal rx_data_valid_i : std_logic;
@@ -74,6 +76,7 @@ begin
 			tx_data        => phy_tx_data,
 			tx_data_en     => phy_tx_data_en,
 			tx_data_ack    => phy_tx_data_ack,
+			tx_active      => phy_tx_active,
 			carrier_detect => phy_carrier_detect,
 			rx_error       => phy_rx_error,
 			rx_p           => rx_p,
@@ -152,4 +155,12 @@ begin
 			data_out => carrier_detect
 		);
 
+	synchronizer_txa_inst : entity work.synchronizer
+		port map(
+			clk      => clk,
+			rst      => rst,
+			data_in  => phy_tx_active,
+			data_out => tx_active
+		);
+
 end architecture RTL;