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mac: Add tx_active output

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Markus Koch 2022-01-16 13:44:33 +01:00
parent 97d0905c08
commit 22b7d99b1f
2 changed files with 3 additions and 0 deletions
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2
trashernet/trashernet_mac.vhd
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@ -215,6 +215,8 @@ begin
phy_in.tx_data_en <= '1' when tx_state /= IDLE else '0'; phy_in.tx_data_en <= '1' when tx_state /= IDLE else '0';
crc_clear <= '1' when tx_state = HEADER else '0'; crc_clear <= '1' when tx_state = HEADER else '0';
phy_in.tx_data <= sr(sr'low); phy_in.tx_data <= sr(sr'low);
mac_out.tx_active <= phy_out.tx_active;
end block tx; end block tx;
end architecture rtl; end architecture rtl;

1
trashernet/trashernet_pkg.vhd
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@ -59,6 +59,7 @@ package trashernet_pkg is
rx_mac_data : byte; -- Ethernet data (after Ethertype) rx_mac_data : byte; -- Ethernet data (after Ethertype)
rx_mac_valid : std_logic; -- `rx_mac` values (headers + data) are valid rx_mac_valid : std_logic; -- `rx_mac` values (headers + data) are valid
tx_mac_data_ack : std_logic; -- The byte on `tx_mac_data` has been latched. Update to next word. tx_mac_data_ack : std_logic; -- The byte on `tx_mac_data` has been latched. Update to next word.
tx_active : std_logic; -- Transmission in progress
rx_mac_crc_ok : std_logic; -- End of packet, CRC OK (strobe independent from other rx_mac fields) rx_mac_crc_ok : std_logic; -- End of packet, CRC OK (strobe independent from other rx_mac fields)
rx_mac_crc_error : std_logic; -- End of packet, CRC invalid rx_mac_crc_error : std_logic; -- End of packet, CRC invalid