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.gitignore
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2
.gitignore
vendored
@ -1,4 +1,4 @@
|
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*.bak
|
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*-cache.lib
|
||||
*.kicad_pcb-bak
|
||||
*.net
|
||||
*.out
|
||||
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12
doc/.gitignore
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doc/.gitignore
vendored
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||||
*.aux
|
||||
*~
|
||||
*.bbl
|
||||
*.bcf
|
||||
*.blg
|
||||
*.log
|
||||
*.run.xml
|
||||
*.synctex.gz
|
||||
*.toc
|
||||
*.pdf
|
||||
*.svg
|
||||
!res/*
|
23
doc/acro.tex
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doc/acro.tex
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|
||||
% Sort using emacs:
|
||||
% http://rtime.felk.cvut.cz/~sojka/blog/sorting-latex-acronyms-in-emacs/
|
||||
%I press C-up to go to \begin{ and then left. This moves me at the end of the
|
||||
% elisp expression.
|
||||
% Press C-x C-e (eval-last-sexp) and the list is sorted!
|
||||
|
||||
\chapter*{List of Abbreviations}
|
||||
\addcontentsline{toc}{chapter}{List of Abbreviations}
|
||||
% Sort acronyms: (let ((sort-fold-case t)) (sort-regexp-fields nil "^[[:space:]]*\\\\acro\{\\([^}]*\\)\}.*$" "\\1" (point-min) (point-max)))
|
||||
|
||||
\begin{acronym}[TDMA]
|
||||
\acro{dtr} [DTR] {data terminal ready}
|
||||
\acro{fpga} [FPGA] {field-programmable gate array}
|
||||
\acro{io} [I/O] {input / output}
|
||||
\acro{jtag} [JTAG] {Joint Test Action Group}
|
||||
\acro{pll} [PLL] {phase locked loop}
|
||||
\acro{led} [LED] {light emitting diode}
|
||||
\acro{ldo} [LDO] {low-dropout regulator}
|
||||
\acro{rx} [RX] {receive}
|
||||
\acro{tx} [TX] {transmit}
|
||||
\acro{uart} [UART] {universal asynchronous receiver / transmitter}
|
||||
\acro{usb} [USB] {universal serial bus}
|
||||
\end{acronym}
|
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doc/img/makepdf.sh
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doc/img/makepdf.sh
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|
||||
#!/bin/bash
|
||||
|
||||
for file in ./*.dia; do
|
||||
p=${file%.dia}
|
||||
p=${p##*/}
|
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outfile="$p.svg"
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||||
dia --export=$outfile $file
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done
|
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|
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for file in ./*.svg; do
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p=${file%.svg}
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p=${p##*/}
|
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outfile="$p.pdf"
|
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inkscape -D -z --file="$file" --export-pdf="$outfile" #--export-latex
|
||||
done
|
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doc/img/overview.dia
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doc/img/overview.png
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doc/lit.bib
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doc/lit.bib
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|
||||
% This file was created with JabRef 2.10.
|
||||
% Encoding: UTF8
|
||||
|
||||
|
||||
@Manual{tlv1117,
|
||||
Title = {TLV1117 Adjustable and Fixed Low-Dropout Voltage Regulator},
|
||||
Author = {Texas~Instruments},
|
||||
Month = {12},
|
||||
Year = {2014},
|
||||
Owner = {markus},
|
||||
Timestamp = {2017.11.10},
|
||||
Url = {http://www.ti.com/lit/ds/symlink/tlv1117.pdf}
|
||||
}
|
||||
|
||||
@Manual{progcable,
|
||||
Title = {Programming Cables User Guide},
|
||||
Author = {Lattice~Semiconductor},
|
||||
Edition = {Version 25.0},
|
||||
Month = {11},
|
||||
Year = {2016},
|
||||
Owner = {markus},
|
||||
Timestamp = {2017.11.10},
|
||||
Url = {http://www.latticesemi.com/~/media/LatticeSemi/Documents/UserManuals/MQ/ProgrammingCableUsersGuide.pdf?document_id=143}
|
||||
}
|
||||
|
||||
@Manual{machxo2conf,
|
||||
Title = {MachXO2 Programming and Configuration Usage Guide},
|
||||
Author = {Lattice~Semiconductor},
|
||||
Month = {7},
|
||||
Year = {2017},
|
||||
Owner = {markus},
|
||||
Timestamp = {2017.11.10},
|
||||
Url = {http://www.latticesemi.com/~/media/LatticeSemi/Documents/ApplicationNotes/MO/MachXO2ProgrammingandConfigurationUsageGuide.pdf?document_id=39085}
|
||||
}
|
||||
|
||||
@Manual{machxo2family,
|
||||
Title = {MachXO2TM Family Data Sheet},
|
||||
Author = {Lattice~Semiconductor},
|
||||
Edition = {Version 3.3},
|
||||
Month = {3},
|
||||
Year = {2017},
|
||||
Owner = {markus},
|
||||
Timestamp = {2017.11.10},
|
||||
Url = {http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/MachXO23/MachXO2FamilyDataSheet.pdf?document_id=38834}
|
||||
}
|
||||
|
||||
@Manual{ioguide,
|
||||
Title = {MachXO2 sysIO Usage Guide},
|
||||
Author = {Lattice~Semiconductor},
|
||||
Month = {9},
|
||||
Year = {2016},
|
||||
Owner = {markus},
|
||||
Timestamp = {2017.11.25},
|
||||
Url = {http://www.latticesemi.com/~/media/LatticeSemi/Documents/ApplicationNotes/MO/MachXO2sysIOUsageGuide.pdf?document_id=39083}
|
||||
}
|
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doc/res/schematic.pdf
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doc/tiny-xo2-documentation.tex
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doc/tiny-xo2-documentation.tex
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|
||||
% Notes:
|
||||
% http://www.ti.com/lit/ds/symlink/tlv1117.pdf
|
||||
% http://www.latticesemi.com/~/media/LatticeSemi/Documents/UserManuals/MQ/ProgrammingCableUsersGuide.pdf?document_id=143
|
||||
% http://www.latticesemi.com/~/media/LatticeSemi/Documents/ApplicationNotes/MO/MachXO2ProgrammingandConfigurationUsageGuide.pdf?document_id=39085
|
||||
% http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/MachXO23/MachXO2FamilyDataSheet.pdf?document_id=38834
|
||||
|
||||
\documentclass[openany,oneside]{scrbook}
|
||||
\usepackage[printonlyused]{acronym}
|
||||
\usepackage[
|
||||
pdftitle={Tiny-XO2 Development Kit},
|
||||
pdfauthor={Markus Koch},
|
||||
pdfsubject={Tiny-XO2 Development Kit},
|
||||
pdfcreator={pdflatex, LaTeX with KOMA-Script},
|
||||
pdfpagemode=UseOutlines,
|
||||
pdfdisplaydoctitle=true,
|
||||
pdflang=en,
|
||||
%plainpages=false,
|
||||
]{hyperref}
|
||||
\hypersetup{
|
||||
colorlinks=true,
|
||||
hidelinks=true,
|
||||
linkcolor=blue,
|
||||
citecolor=green,
|
||||
%filecolor,
|
||||
%menucolor=black,
|
||||
%urlcolor=cyan,
|
||||
bookmarksnumbered=true
|
||||
}
|
||||
\usepackage{booktabs}
|
||||
\usepackage{multirow}
|
||||
\usepackage{graphicx}
|
||||
\usepackage{xcolor}
|
||||
\usepackage{adjustbox}
|
||||
\usepackage{pdfpages}
|
||||
\usepackage{pdflscape}
|
||||
\usepackage[american]{babel}
|
||||
\usepackage[babel,german=quotes]{csquotes}
|
||||
\usepackage[
|
||||
backend=biber,
|
||||
style=numeric,
|
||||
natbib,
|
||||
bibencoding=utf8
|
||||
%apabackref=true,
|
||||
]{biblatex}
|
||||
\addbibresource{lit.bib}
|
||||
\DeclareLanguageMapping{american}{american-apa}
|
||||
|
||||
\newcommand\hwmodSym{%
|
||||
\makebox[1.4em][c]{%
|
||||
\makebox[0pt][c]{\raisebox{.1em}{\small!}}%
|
||||
\makebox[0pt][c]{\color{blue}\Large$\bigtriangleup$}}}%
|
||||
|
||||
\newcommand\WarningSym{%
|
||||
\makebox[1.4em][c]{%
|
||||
\makebox[0pt][c]{\raisebox{.1em}{\small!}}%
|
||||
\makebox[0pt][c]{\color{red}\Large$\bigtriangleup$}}}%
|
||||
|
||||
\usepackage{caption}
|
||||
\captionsetup{labelfont=bf}
|
||||
|
||||
%\usepackage{draftwatermark}
|
||||
%\SetWatermarkScale{5}
|
||||
%\SetWatermarkLightness{0.94}
|
||||
|
||||
\title{Tiny-XO2 Development Kit}
|
||||
\author{Markus Koch $\langle$markus@notsyncing.net$\rangle$}
|
||||
\publishers{\centering\includegraphics[width=.55\textwidth]{img/coverpage.png}}
|
||||
|
||||
\setlength{\parindent}{0cm}
|
||||
\setlength{\parskip}{1em}
|
||||
|
||||
\newcommand{\hwmod}[1]{
|
||||
\begin{center}
|
||||
\adjustbox{minipage=\textwidth,cfbox=blue}{
|
||||
\begin{center}
|
||||
\hwmodSym \textbf{Hardware Modification}\hwmodSym
|
||||
\end{center}
|
||||
#1
|
||||
}
|
||||
\end{center}
|
||||
}
|
||||
\newcommand{\Warning}[1]{
|
||||
\begin{center}
|
||||
\adjustbox{minipage=\textwidth,cfbox=red}{
|
||||
\begin{center}
|
||||
\WarningSym \textbf{Warning}\WarningSym
|
||||
\end{center}
|
||||
#1
|
||||
}
|
||||
\end{center}
|
||||
}
|
||||
|
||||
\begin{document}
|
||||
|
||||
\maketitle
|
||||
|
||||
\include{acro}
|
||||
\acused{led}
|
||||
|
||||
\tableofcontents
|
||||
|
||||
\chapter{Introduction}
|
||||
The Tiny-XO2 is a small, versatile and cost-effective development platform for Lattice MachXO2 \acp{fpga}.
|
||||
|
||||
In addition to the \ac{fpga}, it provides a \ac{usb} to \ac{uart} converter and a crystal to include the basic set of components for any \ac{fpga} design.
|
||||
|
||||
This manual applies to hardware revision 01. The latest version can be found online at \\ \url{https://l.notsyncing.net/tinyxo2}
|
||||
|
||||
\chapter{Hardware}
|
||||
This chapter explains all available hardware functions.
|
||||
|
||||
\section{Overview}
|
||||
Figure \ref{fig:overview} and Table \ref{tab:overview} show an overview of all the functions of the board.
|
||||
|
||||
\begin{figure}[h]
|
||||
\centering
|
||||
\includegraphics[width=\textwidth]{img/overview.pdf}
|
||||
\caption{Board overview}
|
||||
\label{fig:overview}
|
||||
\end{figure}
|
||||
|
||||
\begin{table}[h]
|
||||
\caption{Board function list}
|
||||
\label{tab:overview}
|
||||
\centering
|
||||
\begin{tabular}{ll} \toprule
|
||||
1 & \acs{jtag} programming header \\
|
||||
2 & Lattice LCMXO2-1200HC \acs{fpga} \\
|
||||
3 & Power \ac{led} (Orange) \\
|
||||
4 & \acs{uart} \acs{tx} (Board $\rightarrow$ PC) \acs{led} (Red) \\
|
||||
5 & \acs{uart} \acs{rx} (PC $\rightarrow$ Board) \acs{led} (Green) \\
|
||||
6 & \acs{usb} socket for \acs{uart} and power \\
|
||||
\midrule
|
||||
7 & \acs{io} headers \\
|
||||
8 & 12 MHz crystal oscillator for \acs{fpga} and \acs{usb}-to-\acs{uart} converter \\
|
||||
9 & CH340G \acs{usb} to \acs{uart} converter \\
|
||||
10 & 5 V to 3.3 V \ac{ldo} \\ \bottomrule
|
||||
\end{tabular}
|
||||
\end{table}
|
||||
|
||||
\section{Power Supply}
|
||||
\label{power}
|
||||
The board can be powered either via \ac{usb} or using the \texttt{VB} pin on pin header \texttt{J3}. The input voltage can range from 5 V to 15 V \parencite[page 4]{tlv1117}. A diode between the \ac{usb} jack and the \texttt{VB} pin prevents backfeeding of current into the \ac{usb} connection.
|
||||
|
||||
The \texttt{3V} pins on the pin headers can be used to supply the on-board generated 3.3 V to supporting circuitry. The maximum current to be drawn from these pins is 500 mA\footnote{The maximum current of the AP1117 voltage regulator is 800 mA\parencite[page 4]{tlv1117}. Watch the temperature of \texttt{U1} when drawing high amounts of current.}.
|
||||
|
||||
All \ac{io} pins on header \texttt{J3} use the voltage on pin \texttt{VX} as bank voltage. It may range from 1.2 V to 3.3 V \parencite[page 8]{ioguide}. By populating \texttt{R9} with a zero Ohm resistor, the bank can be connected to the on-board 3.3 V supply. In this case, \texttt{VX} becomes a normal \texttt{3V} pin.
|
||||
|
||||
\hwmod{If a 2.5 V supply voltage is required for all \ac{io} pins, the main voltage regulator \texttt{U1} can be replaced with a 1117-2.5 2.5 V voltage regulator. The \ac{fpga} will continue to function normally in this case. When doing this, all \texttt{3V} pins carry 2.5 V. \texttt{VX} may be supplied with up to 3.3 V. \textbf{The CH340G \ac{usb}-to-serial converter will stop working in this configuration} and needs to be removed from the board.}
|
||||
|
||||
\section{\acs{fpga}}
|
||||
\label{fpga}
|
||||
The \ac{fpga} present on the board is a Lattice LCMXO2-1200HC-\emph{4}SG32C or LCMXO2-1200HC-\emph{6}SG32C.
|
||||
|
||||
\begin{table}[h]
|
||||
\caption{Main features of the \ac{fpga} \parencite[page 3]{machxo2family}}
|
||||
\label{tab:fpgafeatures}
|
||||
\centering
|
||||
\begin{tabular}{ll} \toprule
|
||||
\textbf{Property} & \textbf{Value} \\ \midrule
|
||||
\ac{io} & 21* \\
|
||||
LUTs & 1280 \\
|
||||
Distributed RAM & 10 kbits \\
|
||||
EBR SRAM & 64 kbits \\
|
||||
User flash & 64 kbits \\
|
||||
Hard IPs & 2x I$^2$C, 1x SPI, 1x Timer / Counter, 1x PLL \\ \bottomrule
|
||||
\end{tabular}
|
||||
\\ \textit{* Not all \acp{io} may be usable, see chapter \ref{ioheaders}.}
|
||||
\end{table}
|
||||
|
||||
Depending on the version of the board, either speedgrade 4 or 6 is installed. Check the marking on the chip to determine which version applies.
|
||||
|
||||
|
||||
\section{\acs{uart} and \acsp{led}}
|
||||
\label{uart}
|
||||
The board features a CH340G \ac{usb}-to-\ac{uart} converter. Its \ac{tx} line is connected to pin \texttt{21}, the \ac{rx} line is connected to pin \texttt{20}. Pin \texttt{23} is connected to the \ac{dtr} signal from the chip, which is pulled low as soon as the terminal is opened on the PC.
|
||||
|
||||
See the markings on the board for a quick reference of the pin functions.
|
||||
|
||||
Additionally, the \ac{rx} and \ac{tx} lines have an \ac{led} connected in parallel. Should a specific \ac{led} or \ac{uart} function be not wanted, refer to table \ref{tab:uartresistors} to see how to disable individual features.
|
||||
|
||||
\begin{table}[h]
|
||||
\caption{Resistors to disable \ac{uart} functions}
|
||||
\label{tab:uartresistors}
|
||||
\centering
|
||||
\begin{tabular}{cll} \toprule
|
||||
\textbf{Resistor} & \textbf{Description} \\ \midrule
|
||||
R6 & \ac{uart} \ac{tx} \\
|
||||
R7 & \ac{uart} \ac{rx} \\
|
||||
R8 & \ac{uart} \ac{dtr} \\
|
||||
\midrule
|
||||
R4 & \ac{tx} \ac{led} \\
|
||||
R5 & \ac{rx} \ac{led} \\ \bottomrule
|
||||
\end{tabular}
|
||||
\end{table}
|
||||
|
||||
\paragraph{Reset on terminal.} By default, the \texttt{DTR} pin is pulled low by the CH340 as soon as the terminal is opened on the PC and remains high while it is closed. This high-to-low transition can be detected using an edge detector inside the \ac{fpga} to generate a reset for the rest of the design.
|
||||
|
||||
\hwmod{If only a short pulse is desired when the terminal is opened, \texttt{R8} should be exchanged with a 100 nF capacitor and the internal pull-up of the \ac{fpga} must be enabled. Now, each time the terminal is opened on the PC, the DTR line on the \ac{fpga} will go low for a few ms.}
|
||||
|
||||
\section{Crystal Oscillator}
|
||||
\label{crystal}
|
||||
The board features a 12 MHz crystal oscillator. It supplies the clock to the \ac{usb}-to-\ac{uart} converter and is also connected to pin \texttt{28} of the \ac{fpga}. If the 12 MHz clock signal is not needed on the \ac{fpga}, resistor \texttt{R2} can be removed to free pin \texttt{28} as a general purpose \ac{io} pin. A higher frequency for the design can be generated using the \ac{pll} inside the \ac{fpga}.
|
||||
|
||||
\hwmod{If another base frequency is required, the crystal oscillator on the back (\texttt{U4}) can be exchanged with another value. \textbf{The CH340G \ac{usb}-to-\ac{uart} converter will stop working in this configuration} and needs to be removed from the board.}
|
||||
|
||||
\section{\acs{io} Headers}
|
||||
\label{ioheaders}
|
||||
The \ac{io} headers break out all available \ac{io} pins of the \ac{fpga}. The pin number is marked next to each pin on the board.
|
||||
|
||||
Header \texttt{J3} has no special functions and uses \texttt{VX} as bank voltage. This voltage can be tied to the 3.3 V supply of the board either by installing a zero ohm resistor for component \texttt{R9} or by installing a jumper between the \texttt{VX} and \texttt{3V} pin. Refer to chapter \ref{power} for more information on \ac{io} voltages.
|
||||
|
||||
Header \texttt{J4} has special functions assigned to most of its pins. Refer to Table \ref{tab:iofunctions} for a comprehensive list. In order to use these pins as general purpose \ac{io} pins, refer to the respective chapter. All \ac{io} pins on header \texttt{J4} use 3.3 V as bank voltage.
|
||||
|
||||
Note that the \ac{jtag} pins are connected in parallel to the \ac{jtag} header \texttt{J2} and the corresponding pins on \texttt{J4}.
|
||||
|
||||
\begin{table}[h]
|
||||
\caption{\acs{io} pin special functions}
|
||||
\label{tab:iofunctions}
|
||||
\centering
|
||||
\begin{tabular}{clll} \toprule
|
||||
\textbf{Function} & \textbf{Pin} & \textbf{Name} & \textbf{Note} \\ \midrule
|
||||
\acs{jtag} multiplex & \texttt{26} & $\overline{\textrm{JTAGENB}}$ & See chapter \ref{progopt:multiplex} \\ \midrule
|
||||
|
||||
\multirow{4}{3em}{\acs{jtag}} & \texttt{29} & TMS & \multirow{4}{8em}{See chapter \ref{progopt:always}} \\
|
||||
& \texttt{30} & TCK \\
|
||||
& \texttt{32} & TDI \\
|
||||
& \texttt{01} & TDO \\ \midrule
|
||||
|
||||
\multirow{3}{3em}{\acs{uart}} & \texttt{20} & \acs{rx} & \multirow{3}{8em}{See chapter \ref{uart}} \\
|
||||
& \texttt{21} & \acs{tx} \\
|
||||
& \texttt{23} & \ac{dtr} \\ \midrule
|
||||
|
||||
Clock & \texttt{28} & 12 MHz clock & See chapter \ref{crystal} \\ \bottomrule
|
||||
\end{tabular}
|
||||
\end{table}
|
||||
|
||||
\chapter{Software Configuration}
|
||||
\section{Comparison}
|
||||
\begin{table}[h]
|
||||
\caption{Comparison of configuration methods}
|
||||
\label{tab:confcompare}
|
||||
\centering
|
||||
\begin{tabular}{lcl} \toprule
|
||||
\textbf{Type} & \textbf{Available \acs{io}} & \textbf{Note} \\ \midrule
|
||||
Always-active \acs{jtag} & \texttt{18} & Advanced debugging possible\\
|
||||
Multiplexed \acs{jtag} & \texttt{21} & Special consideration for 4 pins \\
|
||||
Bootloader / None & \texttt{22} & Chip can not be recovered on error\\ \bottomrule
|
||||
\end{tabular}
|
||||
\end{table}
|
||||
|
||||
\section{Programming Options}
|
||||
\label{progopt}
|
||||
|
||||
\subsection{Always-active \acs{jtag}}
|
||||
\label{progopt:always}
|
||||
This is the simplest of all configuration methods. It is supported by any Lattice programmer, including the FTDI FTxxxx based ones.
|
||||
|
||||
To use this method, no special configuration needs to be applied in the Lattice Diamond software. The programming preferences in the \textit{global preferences} in the spreadsheet view should look like this \parencite{machxo2conf}:
|
||||
\begin{table}[h]
|
||||
\caption{Preferences for always-active \ac{jtag} mode}
|
||||
\label{tab:prefmux}
|
||||
\centering
|
||||
\begin{tabular}{lcl} \toprule
|
||||
\textbf{Name} & \textbf{Value} \\ \midrule
|
||||
JTAG\_PORT & ENABLE\\
|
||||
MUX\_CONFIGURATION\_PORTS & DISABLE \\ \bottomrule
|
||||
\end{tabular}
|
||||
\end{table}
|
||||
|
||||
The following connections need to be made between the programmer and the \ac{jtag} header \texttt{J2}: TDO (\texttt{TO}), TDI (\texttt{TI}), TCK (\texttt{TC}), TMS (\texttt{TM}).
|
||||
|
||||
Pins \texttt{29}, \texttt{30}, \texttt{31} and \texttt{01} are not available as user \acp{io} in this configuration. All other pins are available as normal user \acp{io}.
|
||||
|
||||
\subsection{Multiplexed \acs{jtag}}
|
||||
\label{progopt:multiplex}
|
||||
This configuration allows to use the \ac{jtag} pins as normal user \ac{io} as long as some parameters are kept in mind.
|
||||
|
||||
In this mode, the function of pins \texttt{29}, \texttt{30}, \texttt{31} and \texttt{01} is switched using pin \texttt{26} (\texttt{EN}). This pin needs to be pulled low to enable \ac{jtag} mode. This can either be done manually before each programming operation or by using the \texttt{PROGRAMN} pin available on Lattice programmers. To make the automatic switchover work, the following settings need to be applied in the Diamond software \parencite{progcable}:
|
||||
|
||||
\begin{figure}[h]
|
||||
\centering
|
||||
\includegraphics[width=.5\textwidth]{img/jtagmuxset.png}
|
||||
\caption{\ac{jtag} settings for automatic pin multiplexing}
|
||||
\label{fig:jtagmuxset}
|
||||
\end{figure}
|
||||
|
||||
To enable this mode, the following settings need to be configured in the \textit{global preferences} in the spreadsheet view in Lattice Diamond:
|
||||
\begin{table}[h]
|
||||
\caption{Preferences for multiplexed \ac{jtag} mode}
|
||||
\label{tab:prefmux}
|
||||
\centering
|
||||
\begin{tabular}{lcl} \toprule
|
||||
\textbf{Name} & \textbf{Value} \\ \midrule
|
||||
JTAG\_PORT & DISABLE \\
|
||||
MUX\_CONFIGURATION\_PORTS & ENABLE \\ \bottomrule
|
||||
\end{tabular}
|
||||
\end{table}
|
||||
|
||||
When programming the \ac{fpga} in circuit, the user needs to ensure that all \ac{jtag} lines are high-Z during programming (when \texttt{26} (\texttt{EN}) is low). Also, the \ac{jtag} bit patterns should not affect any components attached to the \ac{jtag} pins during a programming operation.
|
||||
|
||||
The following connections need to be made between the programmer and the \ac{jtag} header \texttt{J2}: TDO (\texttt{TO}), TDI (\texttt{TI}), TCK (\texttt{TC}), TMS (\texttt{TM}), PROGRAMN (\texttt{EN}).
|
||||
|
||||
Pin \texttt{26} is not available as user \ac{io} in this configuration. Care needs to be taken when selecting which components to connect to pins \texttt{29}, \texttt{30}, \texttt{31} and \texttt{01}. All other pins are available as normal user \acp{io}.
|
||||
|
||||
\subsection{\acs{uart} Bootloader}
|
||||
\label{progopt:bootloader}
|
||||
The MachXO2 devices can be programmed from the active design. This allows the user to entirely disable all external programming interfaces which makes all \ac{io} pins available to the user logic.
|
||||
|
||||
At the current point in time, this functionality has not been implemented.
|
||||
|
||||
\Warning{Setting these parameters will \textbf{permanently} disable the \ac{jtag} port. This might render the device unusable. Only apply this if you really know what you are doing.}
|
||||
|
||||
\begin{table}[h]
|
||||
\caption{Preferences for bootloader mode}
|
||||
\label{tab:prefmux}
|
||||
\centering
|
||||
\begin{tabular}{lcl} \toprule
|
||||
\textbf{Name} & \textbf{Value} \\ \midrule
|
||||
JTAG\_PORT & DISABLE \\
|
||||
MUX\_CONFIGURATION\_PORTS & DISABLE \\ \bottomrule
|
||||
\end{tabular}
|
||||
\end{table}
|
||||
|
||||
All \ac{io} pins are available as user \acp{io}.
|
||||
|
||||
\chapter{Errata}
|
||||
\section*{Hardware Revision 01}
|
||||
\paragraph{TLV1117-33 decoupling.}
|
||||
The board is missing the 10+ $\mu F$ capacitor on the output of the 1117-3.3 voltage regulator (\texttt{U1}). This might cause instability with certain devices. This problem can be easily solved by installing a 10 $\mu F$ 0805 capacitor right next to \texttt{C7}. Revision 02 addresses this issue.
|
||||
|
||||
|
||||
\chapter{Appendix}
|
||||
\section{Version History}
|
||||
\begin{table}[h]
|
||||
\caption{Version history}
|
||||
\label{tab:versionhistory}
|
||||
\centering
|
||||
\begin{tabular}{ll} \toprule
|
||||
\textbf{Version} & \textbf{Comment} \\ \midrule
|
||||
2017-11-27 & DTR usage, 2.5 V mod, errata, editorial changes \\
|
||||
2017-11-20 & Fix \ac{jtag} TDI pin number \\
|
||||
2017-11-16 & Editorial changes \\
|
||||
2017-11-10 & Initial draft \\ \bottomrule
|
||||
\end{tabular}
|
||||
\end{table}
|
||||
|
||||
\section{Bibliography}
|
||||
\printbibliography[heading=none]
|
||||
|
||||
\section{Schematic}
|
||||
See next page.
|
||||
\begin{landscape}
|
||||
\includepdf[angle=90,pages={1-}]{res/schematic.pdf}
|
||||
\end{landscape}
|
||||
|
||||
\end{document}
|
2
fpga.sch
2
fpga.sch
@ -39,7 +39,7 @@ encoding utf-8
|
||||
Sheet 4 4
|
||||
Title "Tiny-XO2"
|
||||
Date "2017-09-30"
|
||||
Rev "01"
|
||||
Rev "02"
|
||||
Comp "Markus Koch - notsyncing.net"
|
||||
Comment1 "Licensed under CC BY-SA 3.0"
|
||||
Comment2 "https://l.notsyncing.net/tinyxo2"
|
||||
|
151
power.sch
151
power.sch
@ -39,7 +39,7 @@ encoding utf-8
|
||||
Sheet 2 4
|
||||
Title "Tiny-XO2"
|
||||
Date "2017-09-30"
|
||||
Rev "01"
|
||||
Rev "02"
|
||||
Comp "Markus Koch - notsyncing.net"
|
||||
Comment1 "Licensed under CC BY-SA 3.0"
|
||||
Comment2 "https://l.notsyncing.net/tinyxo2"
|
||||
@ -49,78 +49,78 @@ $EndDescr
|
||||
$Comp
|
||||
L AP1117-33 U1
|
||||
U 1 1 59CE0B45
|
||||
P 1750 1200
|
||||
F 0 "U1" H 1750 1442 50 0000 C CNN
|
||||
F 1 "AP1117-33" H 1750 1351 50 0000 C CNN
|
||||
F 2 "TO_SOT_Packages_SMD:SOT-223-3Lead_TabPin2" H 1750 1400 50 0001 C CNN
|
||||
F 3 "" H 1850 950 50 0001 C CNN
|
||||
1 1750 1200
|
||||
P 1750 1150
|
||||
F 0 "U1" H 1750 1392 50 0000 C CNN
|
||||
F 1 "AP1117-33" H 1750 1301 50 0000 C CNN
|
||||
F 2 "TO_SOT_Packages_SMD:SOT-223-3Lead_TabPin2" H 1750 1350 50 0001 C CNN
|
||||
F 3 "" H 1850 900 50 0001 C CNN
|
||||
1 1750 1150
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L C_Small C6
|
||||
U 1 1 59CE0D8D
|
||||
P 1300 1400
|
||||
F 0 "C6" H 1392 1446 50 0000 L CNN
|
||||
F 1 "100n" H 1392 1355 50 0000 L CNN
|
||||
F 2 "Capacitors_SMD:C_0603" H 1300 1400 50 0001 C CNN
|
||||
F 3 "" H 1300 1400 50 0001 C CNN
|
||||
1 1300 1400
|
||||
P 1300 1350
|
||||
F 0 "C6" H 1392 1396 50 0000 L CNN
|
||||
F 1 "100n" H 1392 1305 50 0000 L CNN
|
||||
F 2 "Capacitors_SMD:C_0603" H 1300 1350 50 0001 C CNN
|
||||
F 3 "" H 1300 1350 50 0001 C CNN
|
||||
1 1300 1350
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L CP_Small C5
|
||||
U 1 1 59CE0E72
|
||||
P 1100 1400
|
||||
F 0 "C5" H 1187 1446 50 0000 L CNN
|
||||
F 1 "1u" H 1187 1355 50 0000 L CNN
|
||||
F 2 "Capacitors_SMD:C_0805" H 1100 1400 50 0001 C CNN
|
||||
F 3 "" H 1100 1400 50 0001 C CNN
|
||||
1 1100 1400
|
||||
P 1100 1350
|
||||
F 0 "C5" H 1187 1396 50 0000 L CNN
|
||||
F 1 "10u" H 1187 1305 50 0000 L CNN
|
||||
F 2 "Capacitors_SMD:C_0805" H 1100 1350 50 0001 C CNN
|
||||
F 3 "" H 1100 1350 50 0001 C CNN
|
||||
1 1100 1350
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L C_Small C7
|
||||
U 1 1 59CE1081
|
||||
P 2200 1400
|
||||
F 0 "C7" H 2108 1354 50 0000 R CNN
|
||||
F 1 "100n" H 2108 1445 50 0000 R CNN
|
||||
F 2 "Capacitors_SMD:C_0603" H 2200 1400 50 0001 C CNN
|
||||
F 3 "" H 2200 1400 50 0001 C CNN
|
||||
1 2200 1400
|
||||
P 2200 1350
|
||||
F 0 "C7" H 2108 1304 50 0000 R CNN
|
||||
F 1 "100n" H 2108 1395 50 0000 R CNN
|
||||
F 2 "Capacitors_SMD:C_0603" H 2200 1350 50 0001 C CNN
|
||||
F 3 "" H 2200 1350 50 0001 C CNN
|
||||
1 2200 1350
|
||||
1 0 0 1
|
||||
$EndComp
|
||||
$Comp
|
||||
L GND #PWR05
|
||||
U 1 1 59CE11F3
|
||||
P 1750 1700
|
||||
F 0 "#PWR05" H 1750 1450 50 0001 C CNN
|
||||
F 1 "GND" H 1755 1527 50 0000 C CNN
|
||||
F 2 "" H 1750 1700 50 0001 C CNN
|
||||
F 3 "" H 1750 1700 50 0001 C CNN
|
||||
1 1750 1700
|
||||
P 1750 1650
|
||||
F 0 "#PWR05" H 1750 1400 50 0001 C CNN
|
||||
F 1 "GND" H 1755 1477 50 0000 C CNN
|
||||
F 2 "" H 1750 1650 50 0001 C CNN
|
||||
F 3 "" H 1750 1650 50 0001 C CNN
|
||||
1 1750 1650
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L +3V3 #PWR02
|
||||
U 1 1 59CE142B
|
||||
P 2200 1100
|
||||
F 0 "#PWR02" H 2200 950 50 0001 C CNN
|
||||
F 1 "+3V3" H 2215 1273 50 0000 C CNN
|
||||
F 2 "" H 2200 1100 50 0001 C CNN
|
||||
F 3 "" H 2200 1100 50 0001 C CNN
|
||||
1 2200 1100
|
||||
P 2400 1050
|
||||
F 0 "#PWR02" H 2400 900 50 0001 C CNN
|
||||
F 1 "+3V3" H 2415 1223 50 0000 C CNN
|
||||
F 2 "" H 2400 1050 50 0001 C CNN
|
||||
F 3 "" H 2400 1050 50 0001 C CNN
|
||||
1 2400 1050
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L VBUS #PWR03
|
||||
U 1 1 59CE157B
|
||||
P 1200 1150
|
||||
F 0 "#PWR03" H 1200 1000 50 0001 C CNN
|
||||
F 1 "VBUS" H 1215 1323 50 0000 C CNN
|
||||
F 2 "" H 1200 1150 50 0001 C CNN
|
||||
F 3 "" H 1200 1150 50 0001 C CNN
|
||||
1 1200 1150
|
||||
P 1200 1100
|
||||
F 0 "#PWR03" H 1200 950 50 0001 C CNN
|
||||
F 1 "VBUS" H 1215 1273 50 0000 C CNN
|
||||
F 2 "" H 1200 1100 50 0001 C CNN
|
||||
F 3 "" H 1200 1100 50 0001 C CNN
|
||||
1 1200 1100
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
@ -201,30 +201,28 @@ F 3 "" H 4500 1350 50 0001 C CNN
|
||||
1 0 0 1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
1100 1300 1300 1300
|
||||
1100 1250 1300 1250
|
||||
Wire Wire Line
|
||||
1100 1500 1300 1500
|
||||
1100 1450 1300 1450
|
||||
Wire Wire Line
|
||||
1200 1150 1200 1300
|
||||
Connection ~ 1200 1300
|
||||
1200 1100 1200 1250
|
||||
Connection ~ 1200 1250
|
||||
Wire Wire Line
|
||||
1200 1500 1200 1600
|
||||
1200 1450 1200 1550
|
||||
Wire Wire Line
|
||||
1200 1600 2200 1600
|
||||
1200 1550 2600 1550
|
||||
Wire Wire Line
|
||||
1750 1500 1750 1700
|
||||
Connection ~ 1200 1500
|
||||
1750 1450 1750 1650
|
||||
Connection ~ 1200 1450
|
||||
Wire Wire Line
|
||||
2200 1100 2200 1300
|
||||
2050 1150 2600 1150
|
||||
Wire Wire Line
|
||||
2200 1200 2050 1200
|
||||
2200 1550 2200 1450
|
||||
Connection ~ 1750 1550
|
||||
Connection ~ 2200 1150
|
||||
Wire Wire Line
|
||||
2200 1600 2200 1500
|
||||
Connection ~ 1750 1600
|
||||
Connection ~ 2200 1200
|
||||
Wire Wire Line
|
||||
1200 1200 1450 1200
|
||||
Connection ~ 1200 1200
|
||||
1200 1150 1450 1150
|
||||
Connection ~ 1200 1150
|
||||
Wire Wire Line
|
||||
3400 2750 3500 2750
|
||||
Wire Wire Line
|
||||
@ -356,4 +354,39 @@ Wire Wire Line
|
||||
1750 3250 1750 3350
|
||||
Wire Wire Line
|
||||
1750 2550 1750 2450
|
||||
$Comp
|
||||
L CP_Small C16
|
||||
U 1 1 5A18788A
|
||||
P 2400 1350
|
||||
F 0 "C16" H 2200 1400 50 0000 L CNN
|
||||
F 1 "10u" H 2200 1300 50 0000 L CNN
|
||||
F 2 "Capacitors_SMD:C_0805" H 2400 1350 50 0001 C CNN
|
||||
F 3 "" H 2400 1350 50 0001 C CNN
|
||||
1 2400 1350
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
2400 1550 2400 1450
|
||||
Connection ~ 2200 1550
|
||||
$Comp
|
||||
L CP_Small C17
|
||||
U 1 1 5A1896B7
|
||||
P 2600 1350
|
||||
F 0 "C17" H 2400 1400 50 0000 L CNN
|
||||
F 1 "10u" H 2400 1300 50 0000 L CNN
|
||||
F 2 "Capacitors_SMD:C_0805" H 2600 1350 50 0001 C CNN
|
||||
F 3 "" H 2600 1350 50 0001 C CNN
|
||||
1 2600 1350
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
2600 1150 2600 1250
|
||||
Connection ~ 2400 1150
|
||||
Wire Wire Line
|
||||
2600 1550 2600 1450
|
||||
Connection ~ 2400 1550
|
||||
Wire Wire Line
|
||||
2200 1250 2200 1150
|
||||
Wire Wire Line
|
||||
2400 1050 2400 1250
|
||||
$EndSCHEMATC
|
||||
|
428
tiny-xo2-cache.lib
Normal file
428
tiny-xo2-cache.lib
Normal file
@ -0,0 +1,428 @@
|
||||
EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# +3V3
|
||||
#
|
||||
DEF +3V3 #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "+3V3" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS +3.3V
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3V3 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# AP1117-15
|
||||
#
|
||||
DEF AP1117-15 U 0 10 Y Y 1 F N
|
||||
F0 "U" -150 125 50 H V C CNN
|
||||
F1 "AP1117-15" 0 125 50 H V L CNN
|
||||
F2 "TO_SOT_Packages_SMD:SOT-223-3Lead_TabPin2" 0 200 50 H I C CNN
|
||||
F3 "" 100 -250 50 H I C CNN
|
||||
ALIAS AP1117-18 AP1117-25 AP1117-33 AP1117-50 LD1117S33TR_SOT223 LD1117S12TR_SOT223 LD1117S18TR_SOT223 LD1117S25TR_SOT223 LD1117S50TR_SOT223 NCP1117-12_SOT223 NCP1117-1.5_SOT223 NCP1117-1.8_SOT223 NCP1117-2.0_SOT223 NCP1117-2.5_SOT223 NCP1117-2.85_SOT223 NCP1117-3.3_SOT223 NCP1117-5.0_SOT223
|
||||
$FPLIST
|
||||
SOT?223*TabPin2*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -200 -200 200 75 0 1 10 f
|
||||
X GND 1 0 -300 100 U 50 50 1 1 W
|
||||
X VO 2 300 0 100 L 50 50 1 1 P
|
||||
X VI 3 -300 0 100 R 50 50 1 1 W
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# C
|
||||
#
|
||||
DEF C C 0 10 N Y 1 F N
|
||||
F0 "C" 25 100 50 H V L CNN
|
||||
F1 "C" 25 -100 50 H V L CNN
|
||||
F2 "" 38 -150 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 20 -80 -30 80 -30 N
|
||||
P 2 0 1 20 -80 30 80 30 N
|
||||
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# CP_Small
|
||||
#
|
||||
DEF CP_Small C 0 10 N N 1 F N
|
||||
F0 "C" 10 70 50 H V L CNN
|
||||
F1 "CP_Small" 10 -80 50 H V L CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
CP_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -60 -12 60 -27 0 1 0 F
|
||||
S -60 27 60 12 0 1 0 N
|
||||
P 2 0 1 0 -50 60 -30 60 N
|
||||
P 2 0 1 0 -40 50 -40 70 N
|
||||
X ~ 1 0 100 73 D 50 50 1 1 P
|
||||
X ~ 2 0 -100 73 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# C_Small
|
||||
#
|
||||
DEF C_Small C 0 10 N N 1 F N
|
||||
F0 "C" 10 70 50 H V L CNN
|
||||
F1 "C_Small" 10 -80 50 H V L CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 13 -60 -20 60 -20 N
|
||||
P 2 0 1 12 -60 20 60 20 N
|
||||
X ~ 1 0 100 80 D 50 50 1 1 P
|
||||
X ~ 2 0 -100 80 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Conn_01x15
|
||||
#
|
||||
DEF Conn_01x15 J 0 40 Y N 1 F N
|
||||
F0 "J" 0 800 50 H V C CNN
|
||||
F1 "Conn_01x15" 0 -800 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
Connector*:*_??x*mm*
|
||||
Connector*:*1x??x*mm*
|
||||
Pin?Header?Straight?1X*
|
||||
Pin?Header?Angled?1X*
|
||||
Socket?Strip?Straight?1X*
|
||||
Socket?Strip?Angled?1X*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -50 -695 0 -705 1 1 6 N
|
||||
S -50 -595 0 -605 1 1 6 N
|
||||
S -50 -495 0 -505 1 1 6 N
|
||||
S -50 -395 0 -405 1 1 6 N
|
||||
S -50 -295 0 -305 1 1 6 N
|
||||
S -50 -195 0 -205 1 1 6 N
|
||||
S -50 -95 0 -105 1 1 6 N
|
||||
S -50 5 0 -5 1 1 6 N
|
||||
S -50 105 0 95 1 1 6 N
|
||||
S -50 205 0 195 1 1 6 N
|
||||
S -50 305 0 295 1 1 6 N
|
||||
S -50 405 0 395 1 1 6 N
|
||||
S -50 505 0 495 1 1 6 N
|
||||
S -50 605 0 595 1 1 6 N
|
||||
S -50 705 0 695 1 1 6 N
|
||||
S -50 750 50 -750 1 1 10 f
|
||||
X Pin_1 1 -200 700 150 R 50 50 1 1 P
|
||||
X Pin_10 10 -200 -200 150 R 50 50 1 1 P
|
||||
X Pin_11 11 -200 -300 150 R 50 50 1 1 P
|
||||
X Pin_12 12 -200 -400 150 R 50 50 1 1 P
|
||||
X Pin_13 13 -200 -500 150 R 50 50 1 1 P
|
||||
X Pin_14 14 -200 -600 150 R 50 50 1 1 P
|
||||
X Pin_15 15 -200 -700 150 R 50 50 1 1 P
|
||||
X Pin_2 2 -200 600 150 R 50 50 1 1 P
|
||||
X Pin_3 3 -200 500 150 R 50 50 1 1 P
|
||||
X Pin_4 4 -200 400 150 R 50 50 1 1 P
|
||||
X Pin_5 5 -200 300 150 R 50 50 1 1 P
|
||||
X Pin_6 6 -200 200 150 R 50 50 1 1 P
|
||||
X Pin_7 7 -200 100 150 R 50 50 1 1 P
|
||||
X Pin_8 8 -200 0 150 R 50 50 1 1 P
|
||||
X Pin_9 9 -200 -100 150 R 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Conn_02x04_Odd_Even
|
||||
#
|
||||
DEF Conn_02x04_Odd_Even J 0 40 Y N 1 F N
|
||||
F0 "J" 50 200 50 H V C CNN
|
||||
F1 "Conn_02x04_Odd_Even" 50 -300 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
Connector*:*2x??x*mm*
|
||||
Connector*:*2x???Pitch*
|
||||
Pin_Header_Straight_2X*
|
||||
Pin_Header_Angled_2X*
|
||||
Socket_Strip_Straight_2X*
|
||||
Socket_Strip_Angled_2X*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -50 -195 0 -205 1 1 6 N
|
||||
S -50 -95 0 -105 1 1 6 N
|
||||
S -50 5 0 -5 1 1 6 N
|
||||
S -50 105 0 95 1 1 6 N
|
||||
S -50 150 150 -250 1 1 10 f
|
||||
S 150 -195 100 -205 1 1 6 N
|
||||
S 150 -95 100 -105 1 1 6 N
|
||||
S 150 5 100 -5 1 1 6 N
|
||||
S 150 105 100 95 1 1 6 N
|
||||
X Pin_1 1 -200 100 150 R 50 50 1 1 P
|
||||
X Pin_2 2 300 100 150 L 50 50 1 1 P
|
||||
X Pin_3 3 -200 0 150 R 50 50 1 1 P
|
||||
X Pin_4 4 300 0 150 L 50 50 1 1 P
|
||||
X Pin_5 5 -200 -100 150 R 50 50 1 1 P
|
||||
X Pin_6 6 300 -100 150 L 50 50 1 1 P
|
||||
X Pin_7 7 -200 -200 150 R 50 50 1 1 P
|
||||
X Pin_8 8 300 -200 150 L 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# D_ALT
|
||||
#
|
||||
DEF D_ALT D 0 40 N N 1 F N
|
||||
F0 "D" 0 100 50 H V C CNN
|
||||
F1 "D_ALT" 0 -100 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
TO-???*
|
||||
*SingleDiode
|
||||
*_Diode_*
|
||||
*SingleDiode*
|
||||
D_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 8 -50 50 -50 -50 N
|
||||
P 2 0 1 0 50 0 -50 0 N
|
||||
P 4 0 1 8 50 50 50 -50 -50 0 50 50 F
|
||||
X K 1 -150 0 100 R 50 50 1 1 P
|
||||
X A 2 150 0 100 L 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# GND
|
||||
#
|
||||
DEF GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# LCMXO2-1200HC-4SG32C
|
||||
#
|
||||
DEF LCMXO2-1200HC-4SG32C U 0 40 Y Y 5 L N
|
||||
F0 "U" 400 50 60 H V C CNN
|
||||
F1 "LCMXO2-1200HC-4SG32C" 400 150 60 H V C CNN
|
||||
F2 "" 250 -700 60 H I C CNN
|
||||
F3 "" 250 -700 60 H I C CNN
|
||||
ALIAS LCMXO2-1200HC-5SG32C LCMXO2-1200HC-6SG32C
|
||||
$FPLIST
|
||||
QFN32
|
||||
QFN-32
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
T 0 400 -50 60 0 1 1 FPGA~Power Normal 0 C C
|
||||
T 0 400 -50 60 0 2 1 Bank~0 Normal 0 C C
|
||||
T 0 400 -50 60 0 3 1 Bank~1 Normal 0 C C
|
||||
T 0 400 -50 60 0 4 1 Bank~2 Normal 0 C C
|
||||
T 0 400 -50 60 0 5 1 Bank~3 Normal 0 C C
|
||||
S 0 -100 800 -550 1 1 0 f
|
||||
S 0 0 800 -100 1 1 0 f
|
||||
S 0 -100 800 -1350 2 1 0 f
|
||||
S 800 0 0 -100 2 1 0 f
|
||||
S 0 -100 800 -550 3 1 0 f
|
||||
S 0 0 800 -100 3 1 0 f
|
||||
S 0 -100 800 -1350 4 1 0 f
|
||||
S 0 0 800 -100 4 1 0 f
|
||||
S 0 -100 800 -550 5 1 0 f
|
||||
S 0 0 800 -100 5 1 0 f
|
||||
X VCC 18 -200 -300 200 R 50 50 1 1 W
|
||||
X VCC 2 -200 -200 200 R 50 50 1 1 W
|
||||
X GND 22 1000 -300 200 L 50 50 1 1 W
|
||||
X GND 3 1000 -200 200 L 50 50 1 1 W
|
||||
X PAD 33 -200 -450 200 R 50 50 1 1 U
|
||||
X PT10C_TDO 1 -200 -1000 200 R 50 50 2 1 B
|
||||
X PT17D_DONE 23 -200 -300 200 R 50 50 2 1 B
|
||||
X VCCIO0 24 -200 -1150 200 R 50 50 2 1 W
|
||||
X PT15D_PROGRAMN 25 -200 -200 200 R 50 50 2 1 B I
|
||||
X PT15C_JTAGENB 26 -200 -400 200 R 50 50 2 1 B
|
||||
X PT12D_SDAPCLKC0 27 -200 -500 200 R 50 50 2 1 B
|
||||
X PT12C_SCLPCLKT0 28 -200 -600 200 R 50 50 2 1 B
|
||||
X PT11D_TMS 29 -200 -700 200 R 50 50 2 1 B
|
||||
X PT11C_TCK 30 -200 -800 200 R 50 50 2 1 B
|
||||
X VCCIO0 31 -200 -1250 200 R 50 50 2 1 W
|
||||
X PT10D_TDI 32 -200 -900 200 R 50 50 2 1 B
|
||||
X VCCIO1 19 -200 -450 200 R 50 50 3 1 W
|
||||
X PR5D_PCLKC1 20 -200 -200 200 R 50 50 3 1 B
|
||||
X PR5C_PCLKT1 21 -200 -300 200 R 50 50 3 1 B
|
||||
X PB6D_SOSPISO 10 -200 -400 200 R 50 50 4 1 B
|
||||
X PB9A_PCLKT20 11 -200 -500 200 R 50 50 4 1 B
|
||||
X PB9B_PCLKC20 12 -200 -600 200 R 50 50 4 1 B
|
||||
X PB11A_PCLKT21 13 -200 -700 200 R 50 50 4 1 B
|
||||
X PB11B_PCLKC21 14 -200 -800 200 R 50 50 4 1 B
|
||||
X VCCIO2 15 -200 -1150 200 R 50 50 4 1 W
|
||||
X PB20C_SN 16 -200 -900 200 R 50 50 4 1 B
|
||||
X PB20D_SISPI 17 -200 -1000 200 R 50 50 4 1 B
|
||||
X VCCIO2 7 -200 -1250 200 R 50 50 4 1 W
|
||||
X PB4C_CSSPIN 8 -200 -200 200 R 50 50 4 1 B
|
||||
X PB6C_MCLKCCLK 9 -200 -300 200 R 50 50 4 1 B
|
||||
X PL9A_PCLKT3 4 -200 -200 200 R 50 50 5 1 B
|
||||
X PL9B_PCLKC3 5 -200 -300 200 R 50 50 5 1 B
|
||||
X VCCIO3 6 -200 -450 200 R 50 50 5 1 W
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# LED_ALT
|
||||
#
|
||||
DEF LED_ALT D 0 40 Y N 1 F N
|
||||
F0 "D" 0 100 50 H V C CNN
|
||||
F1 "LED_ALT" 0 -100 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
LED*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 8 -50 -50 -50 50 N
|
||||
P 2 0 1 0 -50 0 50 0 N
|
||||
P 4 0 1 8 50 -50 50 50 -50 0 50 -50 F
|
||||
P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
|
||||
P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
|
||||
X K 1 -150 0 100 R 50 50 1 1 P
|
||||
X A 2 150 0 100 L 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# OSC
|
||||
#
|
||||
DEF OSC U 0 40 Y Y 1 F N
|
||||
F0 "U" 200 -100 60 H V C CNN
|
||||
F1 "OSC" 600 -100 60 H V C CNN
|
||||
F2 "" 200 -150 60 H V C CNN
|
||||
F3 "" 200 -150 60 H V C CNN
|
||||
DRAW
|
||||
S 0 0 800 700 1 1 0 N
|
||||
S 200 360 250 340 1 1 0 N
|
||||
P 2 1 1 0 190 370 260 370 N
|
||||
P 2 1 1 0 225 250 225 330 N
|
||||
P 2 1 1 0 225 450 225 370 N
|
||||
P 2 1 1 0 260 330 190 330 N
|
||||
P 2 1 1 0 300 250 225 250 N
|
||||
P 2 1 1 0 300 450 225 450 N
|
||||
P 2 1 1 0 575 350 550 350 N
|
||||
P 3 1 1 0 570 550 440 550 440 420 N
|
||||
P 4 1 1 0 300 500 300 200 550 350 300 500 N
|
||||
X CON 1 1100 550 300 L 60 60 1 1 I
|
||||
X VSS 2 -300 150 300 R 60 60 1 1 W
|
||||
X OUT 3 1100 350 300 L 60 60 1 1 O
|
||||
X VDD 4 -300 550 300 R 60 60 1 1 W
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# R
|
||||
#
|
||||
DEF R R 0 0 N Y 1 F N
|
||||
F0 "R" 80 0 50 V V C CNN
|
||||
F1 "R" 0 0 50 V V C CNN
|
||||
F2 "" -70 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# USB_OTG
|
||||
#
|
||||
DEF USB_OTG J 0 40 Y Y 1 F N
|
||||
F0 "J" -200 450 50 H V L CNN
|
||||
F1 "USB_OTG" -200 350 50 H V L CNN
|
||||
F2 "" 150 -50 50 H I C CNN
|
||||
F3 "" 150 -50 50 H I C CNN
|
||||
$FPLIST
|
||||
USB*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
C -150 85 25 0 1 10 F
|
||||
C -25 135 15 0 1 10 F
|
||||
S -200 -300 200 300 0 1 10 f
|
||||
S -5 -300 5 -270 0 1 0 N
|
||||
S 10 50 -20 20 0 1 10 F
|
||||
S 200 -205 170 -195 0 1 0 N
|
||||
S 200 -105 170 -95 0 1 0 N
|
||||
S 200 -5 170 5 0 1 0 N
|
||||
S 200 195 170 205 0 1 0 N
|
||||
P 2 0 1 10 -75 85 25 85 N
|
||||
P 4 0 1 10 -125 85 -100 85 -50 135 -25 135 N
|
||||
P 4 0 1 10 -100 85 -75 85 -50 35 0 35 N
|
||||
P 4 0 1 10 25 110 25 60 75 85 25 110 F
|
||||
P 5 0 1 0 -170 220 -70 220 -80 190 -160 190 -170 220 F
|
||||
P 9 0 1 0 -185 230 -185 220 -175 190 -175 180 -65 180 -65 190 -55 220 -55 230 -185 230 N
|
||||
X VBUS 1 300 200 100 L 50 50 1 1 W
|
||||
X D- 2 300 -100 100 L 50 50 1 1 P
|
||||
X D+ 3 300 0 100 L 50 50 1 1 P
|
||||
X ID 4 300 -200 100 L 50 50 1 1 P
|
||||
X GND 5 0 -400 100 U 50 50 1 1 W
|
||||
X Shield 6 -100 -400 100 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# VBUS
|
||||
#
|
||||
DEF VBUS #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "VBUS" 0 150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X VBUS 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# ch340g
|
||||
#
|
||||
DEF ch340g U 0 40 Y Y 1 F N
|
||||
F0 "U" -250 -600 60 H V C CNN
|
||||
F1 "ch340g" 0 600 60 H V C CNN
|
||||
F2 "" -300 450 60 H I C CNN
|
||||
F3 "" -300 450 60 H I C CNN
|
||||
$FPLIST
|
||||
SOIC-16_3.9x9.9mm_Pitch1.27mm
|
||||
SOIC-16
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -300 550 300 -550 0 1 0 f
|
||||
X GND 1 -500 -450 200 R 50 50 1 1 W
|
||||
X DSR 10 500 100 200 L 50 50 1 1 O I
|
||||
X RI 11 500 0 200 L 50 50 1 1 O I
|
||||
X DCD 12 500 -100 200 L 50 50 1 1 O I
|
||||
X DTR 13 500 -200 200 L 50 50 1 1 O I
|
||||
X RTS 14 500 -300 200 L 50 50 1 1 O I
|
||||
X R232 15 500 -450 200 L 50 50 1 1 I
|
||||
X VCC 16 -500 -350 200 R 50 50 1 1 W
|
||||
X TXD 2 500 450 200 L 50 50 1 1 O
|
||||
X RXD 3 500 350 200 L 50 50 1 1 I
|
||||
X V3 4 -500 -250 200 R 50 50 1 1 W
|
||||
X D+ 5 -500 450 200 R 50 50 1 1 B
|
||||
X D- 6 -500 350 200 R 50 50 1 1 B
|
||||
X XI 7 -500 100 200 R 50 50 1 1 I C
|
||||
X XO 8 -500 0 200 R 50 50 1 1 O IC
|
||||
X CTS 9 500 200 200 L 50 50 1 1 O I
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
1103
tiny-xo2.kicad_pcb
1103
tiny-xo2.kicad_pcb
File diff suppressed because it is too large
Load Diff
@ -39,7 +39,7 @@ encoding utf-8
|
||||
Sheet 1 4
|
||||
Title "Tiny-XO2"
|
||||
Date "2017-09-30"
|
||||
Rev "01"
|
||||
Rev "02"
|
||||
Comp "Markus Koch - notsyncing.net"
|
||||
Comment1 "Licensed under CC BY-SA 3.0"
|
||||
Comment2 "https://l.notsyncing.net/tinyxo2"
|
||||
|
@ -39,7 +39,7 @@ encoding utf-8
|
||||
Sheet 3 4
|
||||
Title "Tiny-XO2"
|
||||
Date "2017-09-30"
|
||||
Rev "01"
|
||||
Rev "02"
|
||||
Comp "Markus Koch - notsyncing.net"
|
||||
Comment1 "Licensed under CC BY-SA 3.0"
|
||||
Comment2 "https://l.notsyncing.net/tinyxo2"
|
||||
|
Loading…
Reference in New Issue
Block a user