bench: Clarify HWITL interface creation for local testing

This commit is contained in:
Markus Koch 2022-10-27 17:02:53 +02:00
parent 5f7704cf63
commit 1a41120afa
1 changed files with 6 additions and 7 deletions

View File

@ -17,9 +17,11 @@ import zlib
''' '''
# Set up virtual device using # Set up virtual device using
sudo ip link add virt0 type dummy sudo ip link add dev veth1 type veth peer name veth2
sudo ip link set up virt0 sudo ip link set up veth1
sudo ip addr add 192.168.2.10/24 dev virt0 sudo ip link set up veth2
sudo ip addr add 192.168.2.1/24 dev veth1
sudo ip link set promisc on dev veth1
''' '''
class MacDevReceiver(): class MacDevReceiver():
@ -30,9 +32,6 @@ class MacDevReceiver():
self.dev = dev self.dev = dev
self.mac_rx_ev = Event() self.mac_rx_ev = Event()
print("Setting IF to promisc mode...")
os.system("ip link set promisc on dev {}".format(dev))
ETH_P_ALL=3 ETH_P_ALL=3
self.macdev=socket.socket(socket.AF_PACKET, socket.SOCK_RAW, socket.htons(ETH_P_ALL)) self.macdev=socket.socket(socket.AF_PACKET, socket.SOCK_RAW, socket.htons(ETH_P_ALL))
self.macdev.bind((dev, 0)) self.macdev.bind((dev, 0))
@ -83,7 +82,7 @@ async def hwitl(dut):
await eth_rx.start() await eth_rx.start()
# Start local monitors # Start local monitors
macdev_receiver = MacDevReceiver(dut, eth_tx, eth_rx, "virt0") macdev_receiver = MacDevReceiver(dut, eth_tx, eth_rx, "veth2")
# Wait for VHDL part to be ready # Wait for VHDL part to be ready
await Edge(dut.bench_ready) await Edge(dut.bench_ready)