Block a user
PHY: Don't process Manchester timing right from the start
PHY: Don't process Manchester timing right from the start
Fix in a different way in a5142f9abbb99992abe4201f3ad587159ffcb7ec.
PHY:TX: Improve handling of NLP timing generation
Fixed in 075f935e12dd7d20fe7b20331bc3bef2e10e435f.
PHY:TX: Improve handling of NLP timing generation
RX Data
Hmmm maybe instead of the pull-up, we can do implement a better link-detection in the FPGA... I don't want to affect the input impedance etc...
DEMO: Implement MAC-layer test design
PHY:TX: Improve handling of NLP timing generation