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0834cf0c0d
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Finish basic bitstream generator
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2019-06-21 20:31:34 +02:00 |
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5d86f8c7cf
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Start bitstream generator
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2019-06-20 13:45:04 +02:00 |
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a1d635889c
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Clean up
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2019-06-19 18:32:59 +02:00 |
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925e17372a
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Implement fpga_isp_chain_new
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2019-06-19 18:25:21 +02:00 |
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d0fed3cce4
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Implement ISP chain walker
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2019-06-18 20:15:35 +02:00 |
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cf80ff7b6b
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Reverse order of log levels
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2019-06-17 22:08:24 +02:00 |
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0309934d82
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Add comments for later cleanups
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2019-06-17 22:08:11 +02:00 |
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e12120fade
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Start implementing Kousaten
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2019-06-16 21:27:42 +02:00 |
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0072ed418b
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Initialize CMakeProject for Kousaten
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2019-06-16 17:11:20 +02:00 |
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7544e4256a
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Configure Gerber export for PCBWay
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2019-06-16 13:40:37 +02:00 |
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b8c465da70
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Add power LED label
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2019-06-16 13:20:47 +02:00 |
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2de7b3ec6c
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Add part numbers to silkscreen
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2019-06-16 13:18:15 +02:00 |
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1f72590231
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Make some minor adjustments
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2019-06-15 12:57:17 +02:00 |
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685bc88045
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Change Schottky footprint to SOD123
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2019-06-15 11:47:19 +02:00 |
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58ad3a75c5
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Cover the board in silkscreen
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2019-06-14 20:42:09 +02:00 |
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718d70132b
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Add MokM0d logo
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2019-06-14 19:51:25 +02:00 |
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45827f239a
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Clean up silkscreen
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2019-06-13 19:47:35 +02:00 |
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9f96e5cf82
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Editiorial
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2019-06-13 19:19:26 +02:00 |
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01043be425
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Remove incorrect junction
Fixes #7.
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2019-06-13 19:18:58 +02:00 |
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dc5b791b6d
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Finish layout
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2019-06-13 19:16:26 +02:00 |
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339fb214d7
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Continue work on rev 1
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2019-06-11 21:50:54 +02:00 |
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1c6ae29a8f
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Layout rev 1
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2019-06-10 19:48:44 +02:00 |
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f85577c0f1
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Reset routing, place all components
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2019-06-10 17:27:15 +02:00 |
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a1046d75b8
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Continue trial layout
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2019-06-10 14:25:54 +02:00 |
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fc94685478
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Every day I'm layoutin'
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2019-06-09 23:22:42 +02:00 |
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a9d8d0e654
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doc: Add notes
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2019-06-06 21:25:18 +02:00 |
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01918678ce
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Add licensing information
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2019-06-06 20:45:55 +02:00 |
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8b80a78b3b
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Layout input muxing
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2019-06-05 23:32:39 +02:00 |
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b15d865090
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Start layout
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2019-06-04 22:43:08 +02:00 |
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a2608f41ae
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Ignore BOM
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2019-06-04 22:42:56 +02:00 |
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5bcc79e505
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Create copy of kicad design to optimize for layout
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2019-06-04 21:15:25 +02:00 |
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2c21b9191c
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Move kicad design into separate directory
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2019-06-04 21:14:25 +02:00 |
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798144c729
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Update global project config for PCBWay's rules
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2019-06-04 21:11:08 +02:00 |
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a62036545c
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Reannotate schematic
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2019-06-04 21:05:23 +02:00 |
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5ecdc8c13d
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Clean up
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2019-06-04 20:57:14 +02:00 |
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7b7d467935
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Add power LED and bulk capacitor
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2019-06-04 20:51:59 +02:00 |
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9eaef0c055
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Swap L and T bus on input MUX
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2019-06-01 22:42:13 +02:00 |
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104cc9c9c9
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Flip top and bottom connectors
That way, pin 1 is always left or top.
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2019-06-01 22:22:40 +02:00 |
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626dbde9fe
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Change input LUT mapping to allow F3 access in mode-3
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2019-06-01 22:03:01 +02:00 |
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f762348d03
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Fix footprint of U14
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2019-06-01 18:33:12 +02:00 |
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2c162e729b
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Fix DRC issues
Fixes #6.
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2019-06-01 18:31:45 +02:00 |
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6b2fa97a6f
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Fix right and bottom bus connections
Fixes #2.
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2019-06-01 18:20:26 +02:00 |
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76b1d2d01f
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Annotate, and assign preliminary parts
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2019-06-01 18:12:15 +02:00 |
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037d13c5f6
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Exchange fabric2 with fabric3 on input MUX 2
Resolves #1.
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2019-06-01 17:51:20 +02:00 |
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28b9ad42c3
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Change gender of right and bottom connector
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2019-05-31 22:19:01 +02:00 |
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5445fa2831
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Editorial
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2019-05-31 22:14:42 +02:00 |
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7066cd590e
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Force protection resistors at fabric driver outputs
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2019-05-31 22:12:15 +02:00 |
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e3c4a300d2
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Add pdf and plt to gitignore
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2019-05-31 21:59:20 +02:00 |
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a803213b37
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Replace mode select with schottky + negated
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2019-05-31 21:59:05 +02:00 |
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2a44b7d1c5
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Replace mode select transistor logic with NOR gates
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2019-05-31 21:06:05 +02:00 |
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